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PDF BD6964FVM Data sheet ( Hoja de datos )

Número de pieza BD6964FVM
Descripción Standard Single-phase Full wave Fan motor driver
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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Datasheet
DC Brushless Fan Motor Driver
Standard Single-phase Full wave
Fan motor driver
BD6964FVM
Description
This is the summary of application for BD6964FVM. BD6964FVM can drive FAN motor silently by BTL soft switching, and it
can control rotational speed by PWM signal.
Features
Compact package (MSOP8)
BTL soft switching drive
PWM speed control
Quick start function
Lock protection and auto restart
(without external capacitor)
Lock alarm signal (AL) output
Package
MSOP8
W(Typ) x D(Typ) x H(Max)
2.90mm x 4.00mm x 0.90m
Application
PC, PC peripheral component
(Power supply, VGA card, case FAN etc.)
BD player, Projector etc.
MSOP8
Absolute Maximum Ratings
Parameter
Symbol
Limit
Supply Voltage
VCC 15
Power Dissipation
Pd 0.58(Note 1)
Operating Temperature
Topr
-40+105
Storage Temperature Tstg -55+150
Output Voltage
VOMAX
15
Output Current
IOMAX
800(Note 2)
AL Signal Output Voltage
VAL
15
AL Signal Output Current
IAL
10
Junction Temperature
Tjmax
150
(Note 1) Reduce by 4.68mW/°C over 25°C. (On 70.0mm×70.0mm×1.6mm glass epoxy board)
(Note 2) This value is not to exceed Pd.
Unit
V
W
°C
°C
V
mA
V
mA
°C
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated
over the absolute maximum ratings.
Product structureSilicon monolithic integrated circuit
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
This product is not designed protection against radioactive rays
1/13
TSZ02201-0H1H0B100260-1-2
20.May.2014 Rev.002

1 page




BD6964FVM pdf
BD6964FVM
Datasheet
Description of Operations
1) Lock Protection and Automatic Restart Circuit
Motor rotation is detected by hall signal, and lock detection ON time (tON) and lock detection OFF time (tOFF) are set
by IC internal counter. External part (C or R) is not required. Timing chart is shown in Figure 13.
Idling
H+
OUT1
OUT2
AL
tOFF
tON
Output Tr OFF ON
Motor Lock
locking detection
Hi(open collector)
Lock Recovers
release normal
operation
Figure 13. Lock Protection Timing Chart
2) Soft Switching (silent drive setting)
Input signal to hall amplifier is amplified to produce an output signal.
When the hall element output signal is small, the gradient of switching of output waveform is gentle; When it is large,
the gradient of switching of output waveform is steep. Enter an appropriate hall element output to IC where output
waveform swings sufficiently.
(H+)-(H-)
OUT1
Figure 14. Relation between Hall Element Output Amplitude and Output Waveform
3) Hall Input Setting
Hall input voltage range is shown in operating conditions.
Vcc
Hall input voltage range
upper limit
Hall input voltage range
lower limit
GND
Figure 15. Hall Input Voltage Range
Adjust the value of hall element bias resistor R1 in Figure 16 so that the input voltage of a hall amplifier is input in
"Hall Input Voltage Range" including signal amplitude.
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
5/13
TSZ02201-0H1H0B100260-1-2
20.May.2014 Rev.002

5 Page





BD6964FVM arduino
BD6964FVM
Datasheet
Operational Notes – continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 24. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
11/13
TSZ02201-0H1H0B100260-1-2
20.May.2014 Rev.002

11 Page







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