|
|
PDF R2J20651NP Data sheet ( Hoja de datos )
| Número de pieza | R2J20651NP | |
| Descripción | Integrated Driver - MOS FET (DrMOS) | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de R2J20651NP (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
|
No Preview Available !
To our customers,
www.DataSheet4U.com
Old Company Name in Catalogs and Other Documents
On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1st, 2010
Renesas Electronics Corporation
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
1 page  
R2J20651NP
Pin Arrangement
www.DataSheet4U.com
10 9 8 7 6 5 4 3 2 1
VIN 11
VIN 12
VIN 13
VIN 14
VSWH 15
PGND 16
PGND 17
PGND 18
PGND 19
PGND 20
VIN CGND
VSWH
40 PWM
39 DISBL#
38 THWN
37 CGND
36 GL
35 VSWH
34 VSWH
33 VSWH
32 VSWH
31 VSWH
21 22 23 24 25 26 27 28 29 30
(Top view)
Note: All die-pads (three pads in total) should be soldered to PCB.
Pin Description
Pin Name
LSDBL#
VCIN
VDRV
BOOT
CGND
GH
VIN
VSWH
PGND
GL
THWN
DISBL#
PWM
Pin No.
1
2
3
4
5, 37, Pad
6
8 to 14, Pad
7, 15, 29 to 35, Pad
16 to 28
36
38
39
40
Description
Low-side gate disable
Control input voltage (+5 V input)
Gate supply voltage (+5 V input)
Bootstrap voltage pin
Control signal ground
High-side gate signal
Input voltage
Phase output/Switch output
Power ground
Low-side gate signal
Thermal warning
Signal disable
PWM drive logic input
Remarks
When asserted "L" signal, Low-side gate disable
Driver Vcc input
5 V gate drive
To be supplied +5 V through internal SBD
Should be connected to PGND externally
Pin for Monitor
Pin for Monitor
Thermal warning when over 130°C
Disabled when DISBL# is "L"
Capable of both 3.3 V and 5 V logic input
REJ03G1743-0400 Rev.4.00 Mar 12, 2010
Page 3 of 17
5 Page 
R2J20651NP
Test Circuit
Vinput
A IIN
Vcont
A ICIN
VCIN V
5V pulse
fPWM
6.2 Ω
VCIN VDRV
DISBL#
BOOT
VIN
LSDBL# R2J20651
NP
PWM
VSWH
THWN
PGND
CGND GH GL
0.1 μF
www.DataSheet4U.com
V VIN
Electric
load
IO
Note: PIN = IIN × VIN + ICIN × VCIN
POUT = IO × VO
Efficiency = POUT / PIN
PLOSS(DrMOS) = PIN – POUT
Ta = 27°C
Averaging Average Output Voltage
circuit
V VO
REJ03G1743-0400 Rev.4.00 Mar 12, 2010
Page 9 of 17
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet R2J20651NP.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| R2J20651NP | Integrated Driver - MOS FET (DrMOS) | Renesas Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |