PDF PCA2125 Data sheet ( Hoja de datos )

Número de pieza	PCA2125
Descripción	SPI Real-time clock/calendar
Fabricantes	NXP Semiconductors
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No Preview Available ! PCA2125 SPI Real-time clock/calendar Rev. 01 — 28 July 2008 www.DataSheet4U.com Product data sheet 1. General description The PCA2125 is a CMOS real-time clock/calendar optimized for low-power consumption and an operating temperature up to 125 °C. Data is transferred via a Serial Peripheral Interface (SPI) bus with a maximum data rate of 6.0 Mbit/s. An alarm and timer function are also available with the possibility to generate a wake-up signal on an interrupt pin. AEC Q100 qualiﬁed for automotive applications. 2. Features I Provides year, month, day, weekday, hours, minutes and seconds based on 32.768 kHz quartz crystal I Resolution: seconds to years I Clock operating voltage: 1.3 V to 5.5 V I Low backup current: typical 0.55 µA at VDD = 3.0 V and Tamb = 25 °C I 3-line SPI-bus with separate combinable data input and output I Serial interface (at VDD = 1.6 V to 5.5 V) I 1 second or 1 minute interrupt output I Freely programmable timer with interrupt capability I Freely programmable alarm function with interrupt capability I Integrated oscillator capacitor I Internal power-on reset I Open-drain interrupt pin 3. Applications I Automotive time keeping application I Metering 4. Ordering information Table 1. Ordering information Type number Package Name Description PCA2125TS TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT402-1 1 page NXP Semiconductors www.DataSheet4U.com PCA2125 SPI Real-time clock/calendar [2] Ten’s place in 24 h mode. 8.2 Reset The PCA2125 includes an internal reset circuit which is active whenever the oscillator is stopped; see Figure 3. The oscillator can be stopped, for example, by connecting one of the oscillator pins OSCI or OSCO to ground. osc stopped OSCILLATOR 0 = stopped, 1 = running SDI POR OVERRIDE 0 = override inactive 1 = override active CE CLEAR reset Bit 0 = clear override mode POR_OVRD 1 = override possible 001aaf898 Fig 3. Reset system The oscillator is considered to be stopped during the time between power-up and stable crystal resonance; see Figure 4. This time can be in the range 200 ms to 2 s depending on crystal type, temperature and supply voltage. Whenever an internal reset occurs, the reset ﬂag bit RF is set. PCA2125_1 Product data sheet VDD chip in reset chip not in reset oscillation internal reset Fig 4. Power-on reset t 001aaf897 Table 5. Register reset value Bits labeled ‘-’ are not implemented and will return a ‘0’ when read. Bits labeled ‘X’ are undeﬁned at power-up and unchanged by subsequent resets. Address Register name Bit 76543210 00h Control_1 000 - 10 - - 01h Control_2 00000000 02h Seconds 1XXXXXXX 03h Minutes - XXXXXXX 04h Hours - - XXXXXX 05h Days - - XXXXXX 06h Weekdays - - - - - XXX Rev. 01 — 28 July 2008 © NXP B.V. 2008. All rights reserved. 5 of 36 5 Page NXP Semiconductors www.DataSheet4U.com PCA2125 SPI Real-time clock/calendar Table 19. Register Hour_alarm (address 0Ah) bit description Bit Symbol Value Description 7 AEN_H 0 hour alarm is enabled 1 hour alarm is disabled 6- 0 unused 12 hour mode 5 AMPM 0 indicates AM 1 indicates PM 4 to 0 HOUR_ALARM 01 to 12 this register holds the hour alarm value coded in BCD format when in 12 hour mode 24 hour mode 5 to 0 HOUR_ALARM 00 to 23 this register holds the hour alarm value coded in BCD format when in 24 hour mode Table 20. Register Day_alarm (address 0Bh) bit description Bit Symbol Value Description 7 AEN_D 0 day alarm is enabled 1 day alarm is disabled 6- 0 unused 5 to 0 DAY_ALARM 01 to 31 this register holds the day alarm value coded in BCD format Table 21. Register Weekday_alarm (address 0Ch) bit description Bit Symbol Value Description 7 AEN_W 0 weekday alarm is enabled 1 weekday alarm is disabled 3 to 6 - 0 unused 2 to 0 WEEKDAY_ALARM 0 to 6 this register holds the weekday alarm value PCA2125_1 Product data sheet Rev. 01 — 28 July 2008 © NXP B.V. 2008. All rights reserved. 11 of 36 11 Page

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