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PDF XC6118 Data sheet ( Hoja de datos )

Número de pieza XC6118
Descripción Voltage Detector
Fabricantes Torex Semiconductor 
Logotipo Torex Semiconductor Logotipo



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No Preview Available ! XC6118 Hoja de datos, Descripción, Manual

XC6118 Series
www.DataSheet4U.com
ETR0213-004
Voltage Detector with Separated Sense Pin & Delay Capacitor Pin
GENERAL DESCRIPTION
The XC6118 series is a low power consumption voltage detector with high accuracy detection, manufactured using CMOS
process and laser trimming technologies.
Since the sense pin is separated from the power supply pin, it allows the IC to monitor the other power supply.
The XC6118 can maintain the state of detection even when voltage of the monitored power supply drops to 0V.
Moreover, a release delay time can be adjusted by the external capacitor connected to the Cd pin.
The VOUT pin is available in both CMOS and N-channel open drain output configurations.
APPLICATIONS
Microprocessor reset circuitry
Charge voltage monitors
Memory battery back-up switch circuits
Power failure detection circuits
FEATURES
High Accuracy
:±2(Detect Voltage1.5V)
:±30mV(Detect Voltage1.5V)
Low Power Consumption
Detect Voltage Range
: 0.4μA(Detect, VIN=1.0V) (TYP.)
: 0.8μA(Release, VIN=1.0V)(TYP.)
: 0.8V5.0V (0.1V increments)
Operating Voltage Range
: 1.0V6.0V
Temperature Characteristics : ±100ppm/(TYP.)
Output Configuration
: CMOS, N-channel open drain
Operating Temperature Range : -40℃~+85
Separated Sense Pin
: Power supply separation
Built-in delay time
: Release delay time adjustable
Packages
: USP-4, SOT-25
Environmentally Friendly
: EU RoHS Compliant, Pb Free
TYPICAL APPLICATION CIRCUIT TYPICAL PERFORMANCE
CHARACTERISTICS
Output Voltage vs. Sense Voltage
Monitering
Power
supply
(No Pull-Up resistor needed for
CMOS output product)
XC6118C25AGR
Ta=25
7.0
6.0
5.0 VIN=6.0V
4.0
3.0 4.0V
2.0
1.0
0.0 1.0V
-1.0
012 3456
Sense Voltage: VSEN (V)
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XC6118 pdf
XC6118
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ELECTRICAL CHARACTERISTICS
XC6118xxxA
PARAMETER
Operating Voltage
Detect Voltage
Hysteresis Width
Detect Voltage
Line Regulation
Supply Current 1 (*2)
Supply Current 2 (*2)
Output Current (*3)
SYMBOL
VIN
VDF
VHYS
ΔVDF/
(ΔVINVDF)
ISS1
ISS2
IOUT1
IOUT2
CONDITIONS
VDF(T)=0.85.0V (*1)
VIN=1.06.0V
VIN=1.06.0V
VIN=1.06.0V
VSEN=VDF×0.9
VIN=1.0V
VIN=6.0V
VSEN=VDF×1.1
VIN=1.0V
VIN=6.0V
VSEN=0V, VDS=0.5V(Nch)
VIN=1.0V
VIN=2.0V
VIN=3.0V
VIN=4.0V
VIN=5.0V
VIN=6.0V
VSEN=6.0V,
VDS=0.5V(Pch)
VIN=1.0V
VIN=6.0V
MIN.
1.0
0.1
0.8
1.2
1.6
1.8
1.9
TYP.
E-1
E-2
±0.1
MAX.
6.0
0.4 1.0
0.4 1.0
0.8 1.6
0.9 1.8
0.7
1.6
2.0
2.3
2.4
2.5
-0.30
-1.00
-0.08
-0.70
Ta=25
UNITS CIRCUITS
V-
V
V
%/V
μA
μA
mA
mA
Leakage
Current
CMOS Output
N-ch Open Drain
Output
ILEAK
VIN=6.0V, VSEN=6.0V,
VOUT=6.0V, Cd: Open
0.20
0.20 0.40
μA
Temperature Characteristics
ΔVDF/
(ΔToprVDF)
-40 oCTa85 oC
±100
ppm/oC
Sense Resistance (*4)
Delay Resistance (*5)
Delay capacitance pin
Sink Current
Delay Capacitance Pin Threshold
Voltage
Undefined Operation (*6)
Detect Delay Time (*7)
Release Delay Time (*8)
RSEN
RDELAY
ICD
VTCD
VUNS
tDF0
tDR0
VSEN=5.0V VIN=0V
VSEN=6.0V VIN=5.0V
Cd=0V
Cd=0.5V, VIN=1.0V
VSEN=6.0V VIN=1.0V
VSEN=6.0V VIN=6.0V
VIN=VSEN=01.0V
VIN=6.0V, VSEN=6.00V
Cd: Open
VIN=6.0V, VSEN=06.0V
Cd: Open
1.6
0.4
2.9
E-4
2.0 2.4
200
0.5 0.6
3.0 3.1
0.3 0.4
30 230
30 200
MΩ
MΩ
μA
V
V
μs
μs
NOTE:
*1: VDF (T): Nominal detect voltage
*2: Current to the sense resistor is not included.
*3: IOUT2 is applied only to the XC6118C series (CMOS output).
*4: It is calculated from the voltage value and the current value of the VSEN.
*5: It is calculated from the voltage value of the VIN and the current value of the Cd.
*6: Maximum VOUT voltage when VIN is changed from 0V to 1.0V under connecting the VIN pin to the VSEN pin.
This value is effective only to the XC6118C series (CMOS output).
*7: Delay time from the time of VSEN=VDF to the time of VOUT= 0.6V when the VSEN falls.
*8: Delay time from the time of VIN= VDF +VHYS to the time of VOUT = 5.4V when the VSEN rises.
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XC6118 arduino
XC6118
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OPERATIONAL EXPLANATION
A typical circuit example is shown in Figure 1, and the timing chart of Figure 1 is shown in Figure 2.
VIN
VSEN
SEN=R1+R2+R3
M2
Comparator
R1
Rdelay
M4
Inverter
VIN VSEN
Cd
R2
Vref
M5
R3
M1
M3
Cd
*The XC6118N series (N-ch open
drain output) requires a pull-up
resistor for pulling up output.
VOUT
VSS
Figure 1: Typical application circuit example
Sense Pin Voltage: VSEN(MIN.:0V MAX.:6.0V)
Release Voltage: VDF+VHYS
Detect Voltage: VDF
Delay Capacitance Pin Voltage: VCD(MIN.:VSS, MAX.:VIN)
Delay Capacitance Pin Threshold Voltage: VTCD
Output Voltage Pin Voltage: VOUT (MIN.:VSS MAX:VIN)
Figure 2: The timing chart of Figure 1
As an early state, the sense pin is applied sufficiently high voltage (6.0V MAX.) and the delay capacitance (Cd) is charged
to the power supply input voltage, (VIN: 1.0V MIN., 6.0V MAX.). While the sense pin voltage (VSEN) starts dropping to
reach the detect voltage (VDF) (VSEN>VDF), the output voltage (VOUT) keeps the “High” level (=VIN).
* If a pull-up resistor of the XC6118N series (N-ch open drain) is connected to added power supply different from the input
voltage pin, the “High” level will be a voltage value where the pull-up resistor is connected.
When the sense pin voltage keeps dropping and becomes equal to the detect voltage (VSEN =VDF), an N-ch transistor (M1)
for the delay capacitance (Cd) discharge is turned ON, and starts to discharge the delay capacitance (Cd). An inverter
(Inv.1) operates as a comparator of the reference voltage VIN, and the output voltage changes into the “Low” level (=VSS).
The detect delay time [tDF] is defined as time which ranges from VSEN=VDF to the VOUT of “Low” level (especially, when the
Cd pin is not connected: tDF0).
While the sense pin voltage keeps below the detect voltage, the delay capacitance (Cd) is discharged to the ground voltage
(=VSS) level. Then, the output voltage maintains the “Low” level while the sense pin voltage increases again to reach the
release voltage (VSEN< VDF +VHYS).
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