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PDF AD5175 Datasheet ( Hoja de datos )

Digital Rheostat with I2C Interface and 50-TP Memory - Analog Devices

Número de pieza AD5175
Descripción Digital Rheostat with I2C Interface and 50-TP Memory
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo
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AD5175 datasheet

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AD5175 pdf
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Parameter
tRDAC_R-PERF
tRDAC_NORMAL
tMEMORY_READ
tMEMORY_PROGRAM
tRESET
tPOWER-UP 6
Conditions1
Limit at TMIN, TMAX
Min Max
Unit Description
2 μs RDAC register write command execute time (R-Perf mode)
600 ns RDAC register write command execute time (normal mode)
6 μs Memory readback execute time
350 ms Memory program time
600 μs Reset 50-TP restore time
2 ms Power-on 50-TP restore time
1 Maximum bus capacitance is limited to 400 pF.
2 The SDA and SCL timing is measured with the input filters enabled. Switching off the input filters improves the transfer rate but has a negative effect on EMC behavior
of the part.
3 Input filtering on the SCL and SDA inputs suppresses noise spikes that are less than 50 ns for fast mode.
4 Refer to tRDAC_R-PERF and tRDAC_NORMAL for RDAC register write operations.
5 Refer to tMEMORY_READ and tMEMORY_PROGRAM for memory commands operations.
6 Maximum time after VDD − VSS is equal to 2.5 V.
Shift Register and Timing Diagrams
DB9 (MSB)
DB0 (LSB)
0 0 C3 C2 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
CONTROL BITS
DATA BITS
Figure 2. Shift Register Content
SCL
t6
SDA
t7
PS
RESET
t11
t2
t4
t12
t1
t3
t6
t5 t10
S
Figure 3. 2-Wire I2C Timing Diagram
t8
t9
P
t13
Rev. 0 | Page 5 of 20

5 Page

AD5175 arduino
AD5175
1.0
0.5
0
–0.5
–1.0
–1.5
–10
VDD/VSS = ±2.5V
IAW = 200µA
0 10 20 30 40 50 60
TIME (µs)
Figure 18. Digital Feedthrough
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0.006
0.005
VDD/VSS = 5V/0V
IAW = 10µA
CODE = HALF SCALE
0.004
0.003
0.002
0.001
0
–0.001
–0.002
0
100 200 300 400 500 600 700 800 900 1000
OPERATION AT 150°C (Hours)
Figure 19. Long-Term Drift Accelerated Average by Burn-In
Rev. 0 | Page 10 of 20

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