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Número de pieza | IDT74FST32XL2384 | |
Descripción | 20-bit Bus Switch | |
Fabricantes | Integrated Device Technology | |
Logotipo | ||
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No Preview Available ! IDT74FST32XL2384
20-BIT BUS SWITCH
20-BIT BUS SWITCH
www.DataSheet4U.com
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74FST32XL2384
FEATURES:
− Bus switches provide zero delay paths
− Extended commercial range of –40°C to +85°C
− Low switch on-resistance: FST32XL2384 – 28Ω
− TTL-compatible input and output levels
− ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
− Available in SSOP, TSSOP, and TVSOP Packages
DESCRIPTION:
The FST32XL2384 belongs to IDT's family of Bus switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
generate little or no noise of their own while providing a low resistance path
for an external driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts and the resistance be-
tween input and output ports is small. Without adequate bias on the gate-
to-source junction of the FET, the FET is turned off, therefore with no VCC
applied, the device has hot insertion capability.
The low on-resistance and simplicity of the connection between input and
output ports reduces the delay in this path to close to zero.
The FST32XL2384 is a 20-bit TTL-compatible bus switch. The BEx pins
provide enable control.
FUNCTIONAL BLOCK DIAGRAM
A0 B0
A10
B10
A4 B4 A14 B14
A5 B5 A15 B15
A9
BEA
BEC
B9 A19
BED
BEB
B19
EXTENDED COMMERCIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
SEPTEMBER 1999
DSC-4708/-
1 page IDT74FST32XL2384
20-BIT BUS SWITCH
www.DataSheet4U.com
EXTENDEDCOMMERCIALTEMPERATURERANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
Pulse
Generator
V IN
D.U.T.
RT
V OUT
50pF
CL
500Ω
500Ω
O ctal lin k
SWITCH POSITION
Test Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
FCT LINK
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
tSU tH
ASYNCHRONOUS CONTROL
PRESET
tREM
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU tH
ETC.
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
H IG H -L O W -H IG H
PULSE
1.5V
tW
1.5V
O ctal lin k
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
S W IT C H
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
S W IT C H
OPEN
DISABLE
3V
1.5V
tPLZ
0V
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V 0V
O ctal lin k
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet IDT74FST32XL2384.PDF ] |
Número de pieza | Descripción | Fabricantes |
IDT74FST32XL2384 | 20-bit Bus Switch | Integrated Device Technology |
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