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PDF SAA6703AH Data sheet ( Hoja de datos )
| Número de pieza | SAA6703AH | |
| Descripción | XGA analog input flat panel controller | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
www.DataSheet4U.com
SAA6703AH
XGA analog input flat panel
controller
Product specification
2004 Apr 01
1 page  
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VSSA(BIAS)(B)
VSSA(BIAS)(R) VDDA(ADC)(G)
VSSA(ADC)(B)
VSSA(ADC)(R)
CSG4/A1 SDA
VSSA(BIAS)(G) VDDA(ADC)(B) VDDA(ADC)(R) VSSA(ADC)(G)
CSG2/A0
SCL
TCK
TDI
TRST
TMS
TDO
RST INT
CLK
VCLK
AGCANA
HSYNC
VSYNC
SOGIN
REF_B
REF_G
REF_R
RIN
GIN
BIN
RBIAS
VDDA(IB)
VSSA(BIAS)(SOG)
1
12 19 3
14 21 5
16 23
47
135
CLOCK GENERATOR:
PANEL CLOCK PLL
panel clock
160
SAMPLE CLOCK PLL
PHASE SHIFT
sample clock
syncs
141
140
SYNC-
11 ON-
GREEN
SLICER
4
15
SYNC
SELECTION
AND CSYNC
DECODER
syncs
MODE
DETECTION
syncs
AUTO-
ADJUSTMENT
55 127 42 41 153 154 156 155 157 51 50
6
17
I2C-BUS
INTERFACE
JTAG
INTERFACE
24
7
18
25
configuration
data
test control
signals
26, 32, 38,
46, 71, 91,
103, 123,
CONTROL
145
UNIT
29, 35, 39,
45, 70, 90,
SAA6703AH
control signals
102, 122,
144
panel control
signals
52
53, 54, 126
22
20
13
2 3 × ADC
9
8
10
INPUT
INTERFACE
RGB data
3 × 8-bit DOWN-
SCALER
RGB data
3 × 8-bit
RGB data
3 × 8-bit
OSD
DECOUPLING
FIFO
UPSCALER
OUTPUT
INTERFACE
RGB data
3 × 6-bit or
3 × 8-bit
138, 139
58 to 65,
68, 69,
72 to 77,
80 to 87
COLOUR
LOOK-UP
TABLE
DITHERING
RGB data
3 × 10-bit
RGB data
3 × 6-bit or
3 × 8-bit
RGB data 92 to 99,
3 × 6-bit or 104 to 111,
3 × 8-bit 114 to 121
27, 28, 30, 31,
33, 34, 36, 40,
136, 137, 148
37, 43, 44,
128, 129, 130,
133, 134
48, 56, 66, 78,
88, 100, 112,
124, 131, 142
49, 57, 67, 79,
89, 101, 113,
125, 132, 143
159 158 146 147 149 150 152 151
VDDA(B)
VDDA(G)
VDDA(R)
VSSA(B)
VSSA(G)
VSSA(R)
VDDD(IC1) to
VDDD(IC9)
VSSD(IC1) to
VSSD(IC9)
PCLK
CSG0, CSG1,
CSG3
OUTEN, PWM
PA0 to PA7,
PB0 to PB7,
PC0 to PC7
PD0 to PD7,
PE0 to PE7,
PF0 to PF7
mhc689
n.c.
RESERVED1 to
VSSD(EP1) to
VDDD(EP1) to
RESERVED8
VSSD(EP10)
VDDD(EP10)
VDDA(EP)
VSS(PLL)(P)
VSSA(PLL)(S)
VDDD(PLL)(S)
VSSA(EP)
VDD(PLL)(P)
VDDA(PLL)(S)
VSSD(PLL)(S)
Fig.1 Block diagram.
5 Page 
Philips Semiconductors
XGA analog input flat panel controller
handbook, full pagewidth
VSSA(BIAS)(B) 1
BIN 2
VDDA(ADC)(B) 3
REF_B
VSSA(ADC)(B)
VDDA(B)
VSSA(B)
VDDA(IB)
RBIAS
4
5
6
7
8
9
VSSA(BIAS)(SOG)
SOGIN
VSSA(BIAS)(G)
10
11
12
GIN 13
VDDA(ADC)(G) 14
REF_G
VSSA(ADC)(G)
VDDA(G)
VSSA(G)
VSSA(BIAS)(R)
15
16
17
18
19
RIN 20
VDDA(ADC)(R) 21
REF_R
VSSA(ADC)(R)
VDDA(R)
VSSA(R)
VDDD(IC1)
n.c.
22
23
24
25
26
27
n.c. 28
VSSD(IC1) 29
n.c. 30
n.c. 31
VDDD(IC2) 32
n.c. 33
n.c. 34
VSSD(IC2) 35
n.c. 36
RESERVED1
VDDD(IC3)
VSSD(IC3)
37
38
39
n.c. 40
SAA6703AH
Fig.2 Pin configuration.
2004 Apr 01
11
www.DataSheet4U.com
Product specification
SAA6703AH
120 PF6
119 PF5
118 PF4
117 PF3
116 PF2
115 PF1
114 PF0
113 VDDD(EP7)
112 VSSD(EP7)
111 PE7
110 PE6
109 PE5
108 PE4
107 PE3
106 PE2
105 PE1
104 PE0
103 VDDD(IC7)
102 VSSD(IC7)
101 VDDD(EP6)
100 VSSD(EP6)
99 PD7
98 PD6
97 PD5
96 PD4
95 PD3
94 PD2
93 PD1
92 PD0
91 VDDD(IC6)
90 VSSD(IC6)
89 VDDD(EP5)
88 VSSD(EP5)
87 PC7
86 PC6
85 PC5
84 PC4
83 PC3
82 PC2
81 PC1
MHC690
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet SAA6703AH.PDF ] | |
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