PDF ICS858011 Data sheet ( Hoja de datos )

Número de pieza	ICS858011
Descripción	1-TO-2 DIFFERNTIAL-TO-CML FANOUT BUFFER
Fabricantes	Integrated Circuit System
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No Preview Available ! Integrated Circuit Systems, Inc. PRELIMINARY ICS858011 L S , 1- -2OW KwEwWw.DataTShOeet4U.com DIFFERENTIAL-TO-CML FANOUT BUFFER GENERAL DESCRIPTION ICS The ICS858011 is a high speed 1-to-2 Differential- to-CML Fanout Buffer and is a member of the HiPerClockS™ HiPerClockS™family of high performance clock solutions from ICS. The ICS858011 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The ICS858011 is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications. FEATURES • 2 differential CML outputs • 1 differential LVPECL clock input • IN, nIN pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Output frequency: > 2.5GHz (typical) • Output skew: TBD • Part-to-part skew: TBD • Additive phase jitter, RMS: <100fs (design target) • Propagation delay: 388ps (typical) • Operating voltage supply range: VCC = 2.375V to 3.63V, VEE = 0V • -40°C to 85°C ambient operating temperature • Pin compatible with SY58011U BLOCK DIAGRAM IN VT nIN V REF_AC PIN ASSIGNMENT Q0 nQ0 16 15 14 13 IN 1 12 Q0 VT 2 11 nQ0 VREF_AC 3 10 nQ1 nIN 4 9 Q1 5678 Q1 nQ1 ICS858011 16-Lead VFQFN 3mm x 3mm x 0.95 package body K Package Top View The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 858011AK www.icst.com/products/hiperclocks.html REV. A JULY 12, 2004 1 1 page Integrated Circuit Systems, Inc. PRELIMINARY ICS858011 L S , 1- -2OW KwEwWw.DataTShOeet4U.com DIFFERENTIAL-TO-CML FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION + 3.3V ± 5% or 2.5V ± 5% CML with Internal Pullup VCC GND Power Float GND Supply - VEE OUTPUT LOAD AC TEST CIRCUIT nQx PART 1 Qx nQy PART 2 Qy t sk(pp) PART-TO-PART SKEW nIN IN nQ0, nQ1 Q0, Q1 tPD PROPAGATION DELAY SCOPE Qx nQx V CC nIN V IN IN VEE Cross Points V IL DIFFERENTIAL INPUT LEVEL nQx Qx nQy Qy t sk(o) OUTPUT SKEW V IH VIN VIN, VOUT 400mV (typical) VDIF_IN VDIFF_IN, VDIFF_OUT 800mV (typical) SINGLE ENDED & DIFFERENTIAL INPUT VOLTAGE SWING Clock 20% Outputs 80% tR OUTPUT RISE/FALL TIME 858011AK 80% tF VSW I N G 20% www.icst.com/products/hiperclocks.html 5 REV. A JULY 12, 2004 5 Page Integrated Circuit Systems, Inc. PRELIMINARY ICS858011 L S , 1- -2OW KwEwWw.DataTShOeet4U.com DIFFERENTIAL-TO-CML FANOUT BUFFER PACKAGE OUTLINE - K SUFFIX FOR 16 LEAD VFQFN 858011AK TABLE 5. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS SYMBOL MINIMUM MAXIMUM N 16 A 0.80 1.0 A1 0 0.05 A3 0.25 Reference b 0.18 0.30 e 0.50 BASIC ND 4 NE 4 D 3.0 D2 0.25 1.25 E 3.0 E2 0.25 1.25 L 0.30 0.50 Reference Document: JEDEC Publication 95, MO-220 www.icst.com/products/hiperclocks.html 11 REV. A JULY 12, 2004 11 Page

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Número de pieza	Descripción	Fabricantes
ICS858011	1-TO-2 DIFFERNTIAL-TO-CML FANOUT BUFFER	Integrated Circuit System
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