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PDF M30W0R6500T0 Data sheet ( Hoja de datos )

Número de pieza M30W0R6500T0
Descripción Multi-Chip Package
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! M30W0R6500T0 Hoja de datos, Descripción, Manual

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M30W0R6500T0
96 Mbit (64 + 32Mb, x16, Multiple Bank, Burst, Flash Memories)
1.8V Supply, Multi-Chip Package
FEATURES SUMMARY
MULTI-CHIP PACKAGE
– 1 die of 64 Mbit (4Mb x 16) Flash Memory
– 1 die of 32 Mbit (2Mb x 16) Flash Memory
SUPPLY VOLTAGE
– VDDF1 = VDDF2 = VDDQ = 1.7 to 2.2V
– VPP = 12V for fast Program (optional)
LOW POWER CONSUMPTION
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– 64Mb Device Code (Top Configuration):
8810h
– 32Mb Device Code (Top Configuration):
8814h
PACKAGE
– Compliant with Lead-Free Soldering
Processes
– Lead-Free Versions
FLASH MEMORY
SYNCHRONOUS / ASYNCHRONOUS READ
– Synchronous Burst Read mode: 54MHz
– Asynchronous/ Synchronous Page Read
mode
– Random Access: 70ns
PROGRAMMING TIME
– 8µs by Word typical for Fast Factory
Program
– Double/Quadruple Word Program option
– Enhanced Factory Program options
ARCHITECTURE
– 64Mbit and 32Mbit Flash memories
– Multiple Bank Memory Array: 4 Mbit
Banks
– Parameter Blocks (Top location)
DUAL OPERATIONS
– Program Erase in one Bank while Read in
others
– No delay between Read and Write
operations
Figure 1. Packages
FBGA
Stacked LFBGA88 (ZA)
8 x 10mm
BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WP for Block Lock-Down
SECURITY
– 128 bit user programmable OTP cells
– 64 bit unique device number
– One parameter block permanently
lockable
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
December 2004
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M30W0R6500T0 pdf
Figure 2. Logic Diagram
VDDF2 VPP
VDDF1 VDDQ
22
A0-A21
16
DQ0-DQ15
W
EF1
EF2
GF1 M30W0R6500T0
GF2
RP
WP
L
K
WAIT
VSS VSSQ
AI08597
M30Ww0wRw6.D5a0t0aTSh0eet4U.com
Table 1. Signal Names
A0-A211
Address Inputs
DQ0-DQ15
Data Input/Outputs, Command
Inputs
EF1 Chip Enable of 64Mb Flash Device
EF2 Chip Enable of 32Mb Flash Device
GF1
Output Enable of 64Mb Flash
Device
GF2
Output Enable of 32Mb Flash
Device
W Write Enable
RP Reset
WP Write Protect
K Clock
L Latch Enable
WAIT
Wait
VDDF1
Supply Voltage of 64Mb Flash
device
VDDF2
Supply Voltage of 32Mb Flash
device
VDDQ
Supply Voltage for Input/Output
Buffers
VPP
Optional Supply Voltage for
Fast Program & Erase
VSS Ground
VSSQ
Ground Input/Output Supply
NC Not Connected Internally
DU Do Not Use
Note: 1. A21 is not connected to the 32Mbit Flash Memory com-
ponent.
5/19

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M30W0R6500T0 arduino
M30Ww0wRw6.D5a0t0aTSh0eet4U.com
64MBIT FLASH MEMORY COMPONENT
The M30W0R6500T0 contains a 64Mbit Flash
memory. Only one Flash memory can be enabled
at a time. For detailed information on how to use
the device, refer to the M58WR064E datasheet
which is available from the internet site http://
www.st.com or from your local STMicroelectronics
distributor.
32MBIT FLASH MEMORY COMPONENT
The M30W0R6500T0 contains a 32Mbit Flash
memory. Only one Flash memory can be enabled
at a time. For detailed information on how to use
the device, refer to the M58WR032E datasheet
which is available from the internet site http://
www.st.com or from your local STMicroelectronics
distributor.
11/19

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