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PDF W583M02 Data sheet ( Hoja de datos )

Número de pieza W583M02
Descripción HIGH FIDELITY Power Speech
Fabricantes Winbond 
Logotipo Winbond Logotipo



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Preliminary W583XXX
GENERAL DESCRIPTION
HIGH FIDELITY Power Speech TM
W583xxx are fabricated using the Winbond CMOS process. The W583xxx family is a new member of
the PowerSpeechsynthesizer series, with voice quality which is even better than before. The
W583xxx family has adopted the same architecture as the PowerSpeechsynthesizers while
replacing the 4-bit ADPCM algorithm with Winbonds new high fidelity voice synthesis algorithm to
produce better quality voice. W583xxx provides IR function, CPU interface, pad option for Ring or
Crystal oscillator and voice output in DAC current or PWM type.
According different voice duration, there are 11 bodies in W583xxx family, list them below.
PART NO. W583S10 W583S15 W583S20
Duration
10 sec
15 sec
20 sec
PART NO. W583S50 W583S60 W583S80
Duration
50 sec
60 sec
80 sec
Notes:
1. The voice duration is estimated by 6.4 KHz sampling rate.
2. W583S10 provides less I/O pins, and do not provide crystal oscillator.
W583S25
25 sec
W583S99
99 sec
W583S30
30 sec
W583M02
120 sec
W583S40
40 sec
FEATURES
Programmable speech synthesizer
New high fidelity synthesis algorithm
Wide operating voltage range: 2.4 - 5.5 Volts
Direct drive speaker by PWM output or Built-in 8-bit D/A converter
Supports CPU interface operation
IR interface for command Transmission and Receiving
Symbolic compiler supported
Instruction cycle 400 µS typically
Section control
Variable frequency: 4.8/6/8/12 KHz
LED: ON/OFF
Eight general-purpose registers R0-R7
Pad option for Ring or Crystal oscillator1
8 trigger inputs - with separate control of falling/rising edge trigger2
8 STOP outputs3
Number of interrupt vector / label up to 2,048
Notes:
1. W583S10 provide ring oscillator only.
2. Only 4 trigger pins in W583S10.
3. Only 5 STOP outputs in W583S10.
Publication Release Date: March 1999
- 1 - Revision A1

1 page




W583M02 pdf
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Preliminary W583XXX
Register Definition And Control
The register file of the W583xxx family is composed of 14 registers, including 8 general purpose
registers and 6 special purpose registers.
They are defined to facilitate the operations for various purposes. The default setting values of the
registers are given in the following table.
REGISTER
NAME
DEFAULT SETTING
General Register
R0-R7
00100000B
EN0, EN1
11111111B
Special Register
MODE0, MODE1
11111111B
STOP
11111111B
PAGE
00000000B
Note: EN1 register and bits 5-7 of STOP register are not provided in W583S10.
1. MODE0 Register
BIT DESCRIPTION
7 LED mode
6 LED2/STPC
pin selection
5 IR output source
4 Debounce time
3, 1, 0
2
Reserved
STPA/BUSY
pin selection
DEFINITION
1: Flash
0: DC
1: LED2 output
0: STPC output
1: Hardware control IR output
0: STPC control IR output
1: Long
0: Short
-
1: STPA output
0: BUSY output
MODE0.7 controls the output type of LED1 (and LED2) pin. MODE0.6 controls the configuration of
LED2/STPC pin. MODE0.5 controls the output source of IR. If hardware control IR output is selected,
IR output can have signal with carrier or without carrier which is selected by MODE1.0. MODE0.4
controls the trigger pin debounce time. MODE0.2 controls the behavior of the STPA/BUSY pin which
is usually used as Busy signal in CPU mode.
Publication Release Date: March 1999
- 5 - Revision A1

5 Page





W583M02 arduino
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Preliminary W583XXX
AC Characteristics
PARAMETER
Oscillation Frequency1
SYM.
CONDITIONS
Fosc Ring Oscillator, Rosc = 750 K
Oscillation Frequency
Deviation by Voltage
Drop
Fosc
Fosc
Ring Oscillator, Rosc = 1.6 M
F(3V)-F(2.4V)
F(3V)
Instruction Cycle Time
POI Delay Time
Long Debounce Time
Short Debounce Time2
Tins
TPD
TDEBL
TDEBS
Fosc = 3 MHz, SR = 6 KHz
Fosc = 3 MHz
Fosc = 3 MHz, SR = 6 KHz
1. This parameter is different from that of W58300.
2. For ring oscillator only.
MIN.
2.7
1.3
TYP.
3
1.5
MAX.
3.3
1.7
7.5
UNIT
MHz
%
1/3
160
50
400
mS
mS
mS
µS
TYPICAL APPLICATION CIRCUIT
STPA/BUSY VDD VDD1
STPB
LED2/STPC
STPD
STPE
STPF
STPG
STPH
IROUT
TG1 W583S80
TG2
TG3/IRIN
TG4
TG5 LED1
TG6
TG7
TG8
AUD/SPK+
SPK-
Rosc
VCC
OSC/XIN
XOUT
TEST
SEL
VSS1
RESET
VSS
VCC
VCC
- 11 -
Publication Release Date: March 1999
Revision A1

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