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PDF UPD70F3704 Data sheet ( Hoja de datos )

Número de pieza UPD70F3704
Descripción 32-Bit Single-Chip Microcontrollers
Fabricantes NEC Electronics 
Logotipo NEC Electronics Logotipo



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No Preview Available ! UPD70F3704 Hoja de datos, Descripción, Manual

Preliminary User’s Manual
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V850ES/HF2
32-Bit Single-Chip Microcontrollers
Hardware
µPD70F3702
µPD70F3703
µPD70F3704
Document No. U17719EJ1V0UD00 (1st edition)
Date Published December 2005 N CP(K)
Printed in Japan
2005

1 page




UPD70F3704 pdf
PREFACE
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Readers
Purpose
Organization
This manual is intended for users who wish to understand the functions of the
V850ES/HF2 and design application systems using the V850ES/HF2.
This manual is intended to give users an understanding of the hardware functions of
the V850ES/HF2 shown in the Organization below.
This manual is divided into two parts: Hardware (this manual) and Architecture
(V850ES Architecture User’s Manual).
Hardware
Pin functions
CPU function
On-chip peripheral functions
Flash memory programming
Electrical specifications (target)
Architecture
Data types
Register set
Instruction format and instruction set
Interrupts and exceptions
Pipeline operation
How to Read This Manual
It is assumed that the readers of this manual have general knowledge in the fields of
electrical engineering, logic circuits, and microcontrollers.
To understand the overall functions of the V850ES/HF2
Read this manual according to the CONTENTS.
To find the details of a register where the name is known
Use APPENDIX A REGISTER INDEX.
To understand the details of an instruction function
Refer to the V850ES Architecture User’s Manual available separately.
To know the electrical specifications of the V850ES/HF2
See CHAPTER 25 ELECTRICAL SPECIFICATIONS (TARGET).
Register format
The name of the bit whose number is in angle brackets (<>) in the figure of the
register format of each register is defined as a reserved word in the device file.
The “yyy bit of the xxx register” is described as the “xxx.yyy bit” in this manual. Note
with caution that if “xxx.yyy” is described as is in a program, however, the
compiler/assembler cannot recognize it correctly.
Preliminary User’s Manual U17719EJ1V0UD
5

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UPD70F3704 arduino
12.2
12.3
12.4
12.5
12.6
12.7
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Configuration .........................................................................................................................421
Registers ................................................................................................................................423
Interrupt Request Signals.....................................................................................................429
Operation................................................................................................................................430
12.5.1 Data format.............................................................................................................................. 430
12.5.2 SBF transmission/reception format.......................................................................................... 432
12.5.3 SBF transmission .................................................................................................................... 434
12.5.4 SBF reception.......................................................................................................................... 435
12.5.5 UART transmission.................................................................................................................. 436
12.5.6 Continuous transmission procedure ........................................................................................ 437
12.5.7 UART reception ....................................................................................................................... 439
12.5.8 Reception errors ...................................................................................................................... 440
12.5.9 Parity types and operations ..................................................................................................... 442
12.5.10 Receive data noise filter .......................................................................................................... 443
Dedicated Baud Rate Generator ..........................................................................................444
Cautions .................................................................................................................................452
CHAPTER 13 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB) ....................................................453
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.8
13.9
Features..................................................................................................................................453
Configuration .........................................................................................................................454
Registers ................................................................................................................................456
Interrupt Request Signals.....................................................................................................463
Operation................................................................................................................................464
13.5.1 Single transfer mode (master mode, transmission/reception mode)........................................ 464
13.5.2 Single transfer mode (master mode, reception mode)............................................................. 465
13.5.3 Continuous mode (master mode, transmission/reception mode)............................................. 466
13.5.4 Continuous mode (master mode, reception mode).................................................................. 467
13.5.5 Continuous reception mode (error).......................................................................................... 468
13.5.6 Continuous mode (slave mode, transmission/reception mode) ............................................... 469
13.5.7 Continuous mode (slave mode, reception mode) .................................................................... 470
13.5.8 Clock timing ............................................................................................................................. 471
Output Pin Status with Operation Disabled .......................................................................473
Operation Flow ......................................................................................................................474
Baud Rate Generator ............................................................................................................480
13.8.1 Baud rate generation ............................................................................................................... 481
Cautions .................................................................................................................................482
CHAPTER 14 INTERRUPT/EXCEPTION PROCESSING FUNCTION ...............................................483
14.1
14.2
14.3
Features..................................................................................................................................483
Non-Maskable Interrupts ......................................................................................................486
14.2.1 Operation................................................................................................................................. 488
14.2.2 Restore.................................................................................................................................... 489
14.2.3 NP flag..................................................................................................................................... 490
Maskable Interrupts ..............................................................................................................491
14.3.1
14.3.2
14.3.3
14.3.4
Operation................................................................................................................................. 491
Restore.................................................................................................................................... 493
Priorities of maskable interrupts .............................................................................................. 494
Interrupt control register (xxICn) .............................................................................................. 498
Preliminary User’s Manual U17719EJ1V0UD
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