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PDF PCA9670 Data sheet ( Hoja de datos )

Número de pieza PCA9670
Descripción Remote 8-bit I/O expander
Fabricantes NXP Semiconductors 
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No Preview Available ! PCA9670 Hoja de datos, Descripción, Manual

PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
Rev. 01 — 20 June 2006
Objective data sheet
1. General description
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The PCA9670 provides general purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus
family.
The PCA9670 is a drop-in upgrade for the PCF8574 providing higher Fast-mode Plus
(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
dimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devices
can be on the bus without the need for bus buffers, higher total package sink capacity
(200 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time and
more device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The difference between the PCA9670 and the PCF8574 is that the interrupt output on the
PCF8574 is replaced by a RESET input on the PCA9670.
The devices consist of an 8-bit quasi-bidirectional port and an I2C-bus interface. The
PCA9670 have low current consumption and include latched outputs with 25 mA high
current drive capability for directly driving LEDs.
The internal Power-On Reset (POR), hardware reset pin (RESET), or software reset
sequence initializes the I/Os as inputs.
2. Features
I 1 MHz I2C-bus interface
I Compliant with the I2C-bus Fast and Standard modes
I SDA with 30 mA sink capability for 4000 pF buses
I 2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
I 8-bit remote I/O pins that default to inputs at power-up
I Latched outputs with 25 mA sink capability for directly driving LEDs
I Total package sink capability of 200 mA
I Active LOW reset input
I 64 programmable slave addresses using 3 address pins
I Readable device ID (manufacturer, device type, and revision)
I Low standby current
I 40 °C to +85 °C operation
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
I Packages offered: SO16, TSSOP16, HVQFN16

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PCA9670 pdf
Philips Semiconductors
PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
7. Functional description
Refer to Figure 1 “Block diagram of PCA9670”.
7.1 Device address
Following a START condition, the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9670 is shown in Figure 6. Slave address pins AD2, AD1, and AD0 choose 1 of
64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on
AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in
Table 3 “PCA9670 address map”.
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Remark: When using the PCA9670, reserved I2C-bus addresses must be used with
caution since they can interfere with:
“reserved for future use” I2C-bus addresses (0000 011, 1111 101, 1111 110,
1111 111)
slave devices that use the 10-bit addressing scheme (1111 0xx)
High speed mode (Hs-mode) master code (0000 1xx)
slave address
A6 A5 A4 A3 A2 A1 A0 R/W
programmable
002aab636
Fig 6. PCA9670 address
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected, while a logic 0 selects a write operation.
When AD2, AD1 and AD0 are held to VDD or VSS, the same address as the PCF8574 is
applied.
PCA9670_1
Objective data sheet
Rev. 01 — 20 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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PCA9670 arduino
Philips Semiconductors
PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
8. I/O programming
8.1 Quasi-bidirectional I/O architecture
The PCA9670’s 8 ports (see Figure 2) are entirely independent and can be used either as
input or output ports. Input data is transferred from the ports to the microcontroller in the
Read mode (see Figure 13). Output data is transmitted to the ports in the Write mode (see
Figure 12).
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This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (IOH) to VDD is active. An additional strong pull-up to VDD (Itrt(pu)) allows fast rising
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (IOL) will flow to VSS.
8.2 Writing to the port (Output mode)
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the write mode is entered. The
PCA9670 acknowledges and the master sends the data byte for P7 to P0 and is
acknowledged by the PCA9670. The 8-bit data is presented on the port lines after it has
been acknowledged by the PCA9670.
The number of data bytes that can be sent successively is not limited. The previous data
is overwritten every time a data byte has been sent.
SCL 1 2 3 4 5 6 7 8 9
slave address
data 1
data 2
SDA S A6 A5 A4 A3 A2 A1 A0 0 A P7 P6 1 P4 P3 P2 P1 P0 A P7 0 P5 P4 P3 P2 P1 P0 A
START condition
write to port
data output from port
P5 output voltage
R/W
P5
acknowledge
from slave
P5
acknowledge
from slave
tv(Q)
DATA 1 VALID
acknowledge
from slave
tv(Q)
DATA 2 VALID
P5 pull-up output current
Fig 12. Write mode (output)
Itrt(pu)
IOH
002aac265
PCA9670_1
Objective data sheet
Rev. 01 — 20 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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