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PDF LM3075 Data sheet ( Hoja de datos )

Número de pieza LM3075
Descripción Synchronous Current Mode Buck Controller
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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September 2005
LM3075
High Efficiency, Synchronous Current Mode Buck
Controller
General Description
The LM3075 is a current mode control, synchronous buck
controller IC. Use of synchronous rectification and pulse-
skipping operation at light load achieves high efficiency over
a wide load range. Fixed frequency operation can be ob-
tained by disabling the pulse-skipping mode. Current mode
control assures excellent line and load regulation and a wide
loop bandwidth for fast response to load transients.
www.DataSChuereretn4Ut .mcoomde control can be achieved by either sensing
across the high side NFET or a sense resistor. The switching
frequency can be selected as either 200 kHz or 300 kHz
from an internal clock.
The LM3075 is available with an adjustable output in a
TSSOP-20 package.
Features
n Input voltage range of 4.5V-36V
n Current Mode Control
n Skip mode operation available
n Cycle by cycle current limit
n 1.24V ±2% Reference
Applications
n Automotive Power Supplies
n Distributed Power Systems
Typical Application Circuit
© 2005 National Semiconductor Corporation DS201623
20162301
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LM3075 pdf
Electrical Characteristics Limits in standard type are for TJ = 25˚C only, and limits in boldface type apply
over the junction temperature TJ range of -40˚C to +125˚C. Minimum and Maximum limits are guaranteed through test, design,
or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25˚C, and are provided for reference
purposes only. Unless otherwise specified VIN = 12V. (Continued)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Range indicates conditions for which the device is
intended to be functional, but does not guarantee specfic performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: For testing purposes, ESD was applied using the human-body model, a 100pF capacitor discharged through a 1.5kresistor.
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LM3075 arduino
Operating Descriptions (Continued)
CURRENT SENSING
The inductor current information is extracted by the current
sense pins CSH and CSL. As shown in Figure 1 and Figure
2, current sensing is accomplished by either sensing the Vds
of the top FET, or sensing the voltage across a current sense
resistor connected from VIN to the drain of the top FET. Both
approaches have advantages and disadvantages that need
to be weighed for each specific application. The advantage
of sensing current through the top FET is reduced parts
count, board space, and cost but it also has the disadvan-
tage of accuracy. Using a current sense resistor is the op-
posite, improving current sense accuracy but requiring addi-
tional parts, cost, and board space. The use of a current
sense resistor has the additional disadvantage of increasing
power loss and thus decreasing efficiency.
To ensure linear operation of the current amplifier, the cur-
rent sense voltage input should not exceed 200 mV. There-
www.fmDoaurest,at tSbhheeeeRctad4lscUoun.claootfemtdhecatorepfuFllEyTtooretnhseurceurtrheantt,
sense
when
resistor
the top
FET is conducting the maximum current for that application,
the current sense voltage does not exceed 200 mV.
Assuming a maximum of 200 mV across the CSL/Rdson
resistor, the maximum allowable resistance can be calcu-
lated as follows:
20162308
FIGURE 1. Current Sensing by Vds of the Top FET
Where IMAX is the maximum expected load current, including
an overload multiplier (typically 120%), and IL is the induc-
tor ripple current.
Note that the above equation defines only the maximum
allowable value and not necessarily the recommended
value. As the resistance increases, so do the switching
losses.
CURRENT LIMITING
There is a leading edge blanking circuit that forces the top
FET to be on for at least 180 ns. Beyond this minimum on
time, the output of the PWM comparator is used to turn off
the top FET. With an external resistor connected between
the ILIM pin and the CSH pin the 10 µA current sink on the
ILIM pin produces a voltage across the resistor to serve as
the reference voltage for current limit. Adding a 10 nF ca-
pacitor across this resistor filters unwanted noise that could
improperly trip the current limit comparator. Current limit is
activated if the inductor current is too high causing the
voltage at the CSL pin to be lower than that of the ILIM pin,
toggling the comparator thus turning off the top FET imme-
diately. The comparator is disabled either when the top FET
is turned off or during the leading edge blanking time. The
equation for the current limit resistor, RLIM, is as follows:
20162309
FIGURE 2. Current Sensing by External Sense Resistor
NEGATIVE CURRENT LIMIT
The purpose of negative current limit is to ensure that the
inductor does not saturate during negative current flow caus-
ing excessive current to flow through the bottom FET. The
negative current limit is realized through sensing the bottom
FET Vds. An internally generated 100mV (typical) reference
is used to compare with the bottom FET Vds when it is on.
Upon sensing too high a Vds, the bottom FET is turned off.
The negative current limit is only activated in force PWM
mode.
OVER VOLTAGE PROTECTION (OVP)
The LM3075 responds to over-voltage events by attempting
to recover without the need to restart the IC. There is a trip
point at approximately 111% (typical) of VOUT that, once
reached, causes the circuit to shut off the HDRV FET and
turn on the LDRV FET immediately to drive the bottom FET
to discharge the output capacitor through the filter inductor.
The system stays in this configuration until the output falls
below approximately 108% (typical) of VOUT. Once this lower
level has been reached, the system resumes operation in
either DCM or CCM. This scenario repeats until the cause of
the over-voltage condition is removed.
UNDER VOLTAGE PROTECTION
When an under-voltage event is detected by the LM3075
and the under-voltage protection (UVP) is in ready mode, the
IC attempts to restart the entire system. It does so by shut-
ting off both the LDRV and HDRV FETs until the soft-start
capacitor has discharged below a level of 60mV (typical). At
this point, the IC shuts off the UVP and restarts the system
as though it had just been powered up. The UVP is re-
engaged once the soft-start capacitor voltage reaches a
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