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PDF iCE65L04 Data sheet ( Hoja de datos )
| Número de pieza | iCE65L04 | |
| Descripción | Ultra Low-Power FPGA Known Good Die | |
| Fabricantes | SiliconBlue | |
| Logotipo |  |
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iCE DiCE™:
iCE65L04 Ultra Low-Power
FPGA Known Good Die
March 23, 2009 (1.5.3)
R
SiliconBlue
Preliminary (SUBJECT TO CHANGE)
Features
First ultra low-power programmable logic
family specifically designed for hand-held
applications and long battery life
Less than 15 µA typical standby current (–U);
no special power down modes required
Lowest active power consumption of any
comparable programmable logic family
Lowest heat dissipation on power-sensitive
applications
www.KDnatoawShneeGt4oUo.cdomDie (KGD)
Ideal for System-in-Package (SiP), stacked-die, or
multi-chip module applications
Ideal for Chip on Board (COB) mounting in low-
cost consumer products
Various temperature range, thickness, and
delivery method options
Reprogrammable from a variety of sources
Self-loading from secure, internal Nonvolatile
Configuration Memory (NVCM)
Superior design and intellectual property (IP)
protection; no exposed configuration data
Single-chip programmable solution
Low-cost, high-volume configuration source
Self-loading from external, commodity SPI serial
Flash PROM
Downloaded by processor using SPI-like serial
interface
Built on proven, high-volume 65 nm, low-
power CMOS technology delivering lowest
possible power and cost
Figure 1: iCE65L04 Die Photo (Magnified)
Up to 200+ MHz internal performance
Flexible programmable logic and programmable
interconnect fabric
Over 3,500K four-input look-up tables (LUT4) and
flip-flops
Low-power logic and interconnect
On-chip, 4Kbit RAM blocks; 20 per device
Flexible I/O blocks to simplify system interfaces
176 programmable I/O pads
Four independently-powered I/O banks support
3.3V, 2.5V, or 1.8V voltage standards
Differential LVDS I/O pairs
Table 1: iCE65 Ultra Low-Power Programmable Logic Family Summary
Logic Cells (LUT + Flip-Flop)
Approximate System Gate Count
Typical Equivalent Macrocells
RAM4K Memory Blocks
RAM4K RAM bits
Configuration bits (Kbits maximum)
Typical Current at ≤ 32.768 kHz (-U)
Maximum Programmable I/O Pins
Maximum Differential Input Pairs
iCE65L02
1,792
100K
1,400
16
64K
314 Kb
8 µA
128
16
iCE65L04
3,520
200K
2,700
20
80K
533 Kb
15 µA
176
20
iCE65L08
7,680
400K
6,000
32
128K
1,057 Kb
30 µA
222
25
iCE65L16
16,896
800K
13,000
96
384K
2,404 Kb
75 µA
384
54
© 2007-2009 by SiliconBlue Technologies Corporation. All rights reserved.
www.SiliconBlueTech.com
PRELIMINARY
(1.5.3, 23-MAR-2009)
1
1 page  
SiliconBlue
Bond Pad Listing and Coordinates
Table 3 lists each of the 254 bonding pads on an iCE65L04 device. The pad number begins in the upper left corner of
the die, as shown in Figure 4, and increments in a counter-clockwise direction around the perimeter of the die. .
Each bonding pad is identified. Signal names are color-coded by function. I/O pairs are grouped together with a
thick surrounding box. These pairs in I/O Bank 3 represent an optional differential input or output. In all other
banks, these pairs represent an optional differential output. The pad coordinates are measured relative to the
origin, in the lower left corner of the die.
Table 3: iCE65L04 Bond Pad Listing and Coordinates (Relative to Origin)
From Origin
From Origin
Pad Signal Name X (µm) Y (µm)
Pad Signal Name
X (µm) Y (µm)
1 PIO3_00/DP00A
2 PIO3_01/DP00B
3 PIO3_02/DP01A
4 PIO3_03/DP01B
www.Da5taSheet4U.com GND
6 GND
7 VCCIO_3
129.40
231.40
129.40
231.40
129.40
231.40
129.40
2,687.75
2,642.74
2,597.75
2,552.74
2,507.75
2,462.74
2,417.75
39 VCCIO_3
40 VCCIO_3
41 GND
42 GND
43 PIO3_24/DP12A
44 PIO3_25/DP12B
45 GND
129.40
231.40
129.40
231.40
129.40
231.40
129.40
1,277.75
1,242.74
1,207.75
1,172.74
1,137.75
1,102.74
1,067.75
8 VCCIO_3
231.40 2,372.74
46 PIO3_26/DP13A
231.40 1,032.74
9 PIO3_04/DP02A
129.40 2,327.75
47 PIO3_27/DP13B
129.40 997.75
10 PIO3_05/DP02B
231.40 2,292.74
48 PIO3_28/DP14A
231.40 962.74
11 PIO3_06/DP03A
129.40 2,257.75
49 PIO3_29/DP14B
129.40 927.75
12 PIO3_07/DP03B
231.40 2,222.74
50 PIO3_30/DP15A
231.40 892.74
13 VCC
129.40 2,187.75
51 PIO3_31/DP15B
129.40 857.75
14 PIO3_08/DP04A
231.40 2,152.74
52
VCC
231.40 822.74
15 PIO3_09/DP04B
129.40 2,117.75
53 PIO3_32/DP16A
129.40 787.75
16 PIO3_10/DP05A
231.40 2,082.74
54 PIO3_33/DP16B
231.40 752.74
17 PIO3_11/DP05B
129.40 2,047.75
55
VCCIO_3
129.40 717.75
18 GND
19 PIO3_12/DP06A
20 PIO3_13/DP06B
21 GND
22 GND
23 PIO3_14/DP07A
24 PIO3_15/DP07B
25 VCCIO_3
26 VCC
231.40
129.40
231.40
129.40
231.40
129.40
231.40
129.40
231.40
2,012.74
1,977.75
1,942.74
1,907.75
1,872.74
1,837.75
1,802.74
1,767.75
1,732.74
56 VCCIO_3
57 GND
58 GND
59 PIO3_34/DP17A
60 PIO3_35/DP17B
61 PIO3_36/DP18A
62 PIO3_37/DP18B
63 PIO3_38/DP19A
64 PIO3_39/DP19B
231.40
129.40
231.40
129.40
231.40
129.40
231.40
129.40
231.40
682.74
637.75
592.74
547.75
502.74
457.75
412.74
367.75
322.74
27 PIO3_16/DP08A
28 PIO3_17/DP08B
129.40 1,697.75
231.40 1,662.74
65
66
PIO2_00
PIO2_01
545.00
595.00
139.20
37.20
29 PIO3_18/DP09A
30 GBIN7/PIO3_19/DP09B
31 VCCIO_3
32 VREF
33 GND
129.40
231.40
129.40
231.40
129.40
1,627.75
1,592.74
1,557.75
1,522.74
1,487.75
67
68
69
70
71
PIO2_02
GND
PIO2_03
PIO2_04
PIO2_05
645.00
695.00
745.00
795.00
845.00
139.20
37.20
139.20
37.20
139.20
34 GBIN6/PIO3_20/DP10A
35 PIO3_21/DP10B
231.40 1,452.74
129.40 1,417.75
72
73
PIO2_06
PIO2_07
895.00
930.00
37.20
139.20
36 GND
37 PIO3_22/DP11A
38 PIO3_23/DP11B
231.40
129.40
231.40
1,382.74
1,347.75
1,312.74
74
75
76
PIO2_08
VCCIO_2
PIO2_09
965.00
1,000.00
1,035.00
37.20
139.20
37.20
SiliconBlue Technologies Corporation
www.SiliconBlueTech.com
PRELIMINARY
(1.5.3, 23-MAR-2009)
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet iCE65L04.PDF ] | |
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