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PDF PCA9507 Data sheet ( Hoja de datos )

Número de pieza PCA9507
Descripción 2-wire serial bus extender
Fabricantes NXP Semiconductors 
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PCA9507
2-wire serial bus extender for HDMI DDC I2C-bus and SMBus
Rev. 01 — 7 February 2008
Product data sheet
1. General description
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The PCA9507 is a 2-wire serial bus extender providing 3.3 V to 5 V level shift that allows
up to 18 meters bus extension for reliable DDC, I2C-bus or SMBus applications. While
retaining all the operating modes and features of the I2C-bus system during the level
shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both
the data (SDA) and the clock (SCL) line as well as the rise time accelerator on port A
enabling the bus to drive a load up to 1400 pF or distance of 18 m on port A, and 400 pF
on port B. Using the PCA9507 enables the system designer to isolate bus capacitance to
meet HDMI DDC version 1.3 distance specification. The SDA and SCL pins are
overvoltage tolerant and are high-impedance when the PCA9507 is unpowered.
The port B drivers with static level offset behave much like the drivers on the PCA9515
device, while the port A drivers integrate the rise time accelerator, sink more current and
eliminate the static offset voltage. This results in a LOW on port B translating into a nearly
0 V LOW on port A. The static level offset design of the port B I/O drivers prevent them
from being connected to another device that has rise time accelerator including the
PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515, PCA9516A, PCA9517
(B-side), or PCA9518. The port A sides of two or more PCA9507s can be connected
together, however, to allow a star topography with port A on the common bus, and port A
can be connected directly to any other buffer with static or dynamic offset voltage. Multiple
PCA9507s can be connected in series, port A to port B, with no build-up in offset voltage
with only time of flight delays to consider. Rise time accelerator on port A is turned on
when input threshold is above 0.3VCC(A).
The PCA9507 drivers are not enabled unless VCC(A) and VCC(B) are above 2.7 V. The EN
pin can also be used to turn the drivers on and off under system control. Caution should
be observed to only change the state of the enable pin when the bus is idle. The output
pull-down on the port B internal buffer LOW is set for approximately 0.5 V, while the input
threshold of the internal buffer is set about 70 mV lower (0.43 V). When the port B I/O is
driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring.
2. Features
I 2 channel, bidirectional buffer isolates capacitance allowing 1400 pF on port A and
400 pF on port B
I Exceeds 18 meters (above the maximum distance for HDMI DDC)
I Rise time accelerator and normal I/O on port A
I Static level offset on port B
I Voltage level translation from 2.7 V to 5.5 V
I Upgrade replacement over PCA9517 for cable application

1 page




PCA9507 pdf
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I2C-bus and SMBus
6.3 Resistor pull-up value selection
6.3.1 Port A (SDAA and SCLA)
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SDAA and SCLA are open-drain I/O that have rise time accelerators and strong pull-down.
When the inputs transition above 0.3VCC(A), the rise time accelerator activates and boosts
the pull-up current during rising edge to meet the I2C-bus rise time specification when the
device drives a long cable or heavier capacitance load. The strong pull-down enables the
output to drive to nearly zero voltage for logic LOW. The selection for pull-up resistors are
defined in the HDMI DDC specification shown in Table 3. For HDMI transmitter
applications like digital video player, recorder, or set-top box, the pull-up resistor is in the
range of 1.5 kto 2 k. For HDMI receiver applications like in LCD TV or video card, the
pull-up resistor is 47 kon the SCLA line, and there is no pull-up on the SDAA line.
Please refer to Table 3, Figure 7 and Figure 8 for more details. Figure 5 shows the port A
pull-up resistor values (in k) versus capacitance load (in nF) for 5 V supply voltage
complied with 1 µs rise time per I2C-bus Standard-mode specification. The graph
contrasts a shaded and unshaded region. Any resistor value chosen within the unshaded
region would comply with 1 µs rise time, while any value chosen in the shaded region
would not.
Table 3.
Pin
SDAA
SCLA
HDMI DDC pull-up resistors specification
Where
Minimum
at the source (DVD/STB)
1.5 k
at the sink (LCD TV)
-
at the source (DVD/STB)
1.5 k
at the sink (LCD TV)
Maximum
2.0 k
-
2.0 k
47 kΩ ± 10 %
10.5
RPU
(k)
8.5
002aad620
6.5
4.5
complies with
1 µs rise time
2.5
does not comply with
1 µs rise time
0.5
0
1.0 2.0 3.0
CL (nF)
rise time = 1 µs; VCC(A) = 5 V
Fig 5. SDAA/SCLA line pull-up resistor versus load capacitance
4.0
PCA9507_1
Product data sheet
Rev. 01 — 7 February 2008
© NXP B.V. 2008. All rights reserved.
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PCA9507 arduino
NXP Semiconductors
PCA9507
2-wire serial bus extender for HDMI DDC I2C-bus and SMBus
9. Static characteristics
Table 5. Static characteristics
VCC = 2.7 V to 5.5 V; GND = 0 V; Tamb = 40 °C to +85 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Supplies
VCC(B)
VCC(A)
ICC(VCC(A))
ICCH(B)
supply voltage port B
supply voltage port A
supply current on pin VCC(A)
port B HIGH-level supply current
w w wICC.L(DB) a t apSorht BeLOe Wt -4levUel.scupoplymcurrent
both channels HIGH; VCC = 5.5 V;
SDAn = SCLn = VCC
both channels LOW; VCC = 5.5 V;
one SDA and one SCL = GND;
other SDA and SCL open
2.7
[1] 2.7
-
-
-
-
-
-
1.5
1.5
ICCL(A)
port A LOW-level supply current
both channels LOW; VCC = 5.5 V;
one SDA and one SCL = GND;
other SDA and SCL open
-
1.5
ICC(B)c
contention port B supply current VCC(B) = 5.5 V;
SDAB = SCLB = 0.2 V
- 1.5
Input and output SDAB and SCLB
VIH HIGH-level input voltage
VIL LOW-level input voltage
VILc contention LOW-level input
voltage
0.7VCC(B) -
[2] 0.5
-
0.5 0.4
VIK
ILI
IIL
VOL
VOLVILc
input clamping voltage
input leakage current
LOW-level input current
LOW-level output voltage
difference between LOW-level
output and LOW-level input
voltage contention
II = 18 mA
VI = 5.5 V
SDA, SCL; VI = 0.2 V
IOL = 100 µA or 6 mA
guaranteed by design
--
--
--
0.47 0.52
--
Cio input/output capacitance
Input and output SDAA and SCLA
VI = 3 V or 0 V; VCC = 3.3 V
VI = 3 V or 0 V; VCC = 0 V
-6
-6
VIH
VIL
VIK
ILI
IIL
VOL
Cio
Itrt(pu)
HIGH-level input voltage
LOW-level input voltage
input clamping voltage
input leakage current
LOW-level input current
LOW-level output voltage
input/output capacitance
transient boosted pull-up current
II = 18 mA
VCC = VI = 5.5 V
SDA, SCL; VI = 0.2 V
IOL = 6 mA
VI = 3 V or 0 V; VCC = 3.3 V
VI = 3 V or 0 V; VCC = 0 V
VCC(A) = 4.5 V;
slew rate = 1.25 V/µs
0.7VCC(A) -
[3] 0.5
-
--
--
--
- 0.1
--
-6
-6
Max Unit
5.5 V
5.5 V
1 mA
5 mA
5 mA
5 mA
5 mA
5.5 V
+0.3VCC(B) V
-V
1.2 V
±1 µA
10 µA
0.6 V
70 mV
7 pF
7 pF
5.5 V
+1.5 V
1.2 V
±1 µA
10 µA
0.2 V
7 pF
7 pF
- mA
PCA9507_1
Product data sheet
Rev. 01 — 7 February 2008
© NXP B.V. 2008. All rights reserved.
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