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PDF ICS843-75 Data sheet ( Hoja de datos )
| Número de pieza | ICS843-75 | |
| Descripción | LVPECL DUAL OUTPUT OSCILLATOR | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS843-75 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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Integrated
Circuit
Systems, Inc.
ICS843-75
75MHZ, LVCMOS, LVPECL
DUAL OUTPUT OSCILLATOR
GENERAL DESCRIPTION
The ICS843-75 is a SAS/SATA Dual Output
ICS Oscillator and a member of the HiPerClocksTM
HiPerClockS™ family of high performance devices from ICS.
The ICS843-75 uses a 25MHz crystal to
synthesize 75MHz. The ICS843-75 has
excellent jitter performance. The ICS843-75 is packaged
in a small 8-pin TSSOP, making it ideal for use in systems
with limited board space.
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FEATURES
• One LVCMOS/LVTTL output, 15Ω output impedence
One LVPECL output pair
• Crystal oscillator interface designed for 25MHz,
18pF parallel resonant crystal
• Output frequency: 75MHz
• Random jitter: 3.07ps (maximum)
• Deterministic jitter: 0.13ps (maximum)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
25MHz
XTAL_IN
XTAL_OUT
Clock
Synthesizer
LVCMOS
75MHz
Q0
LVPECL
75MHz
Q1
nQ1
PIN ASSIGNMENT
VCC
XTAL_IN
XTAL_OUT
VEE
1
2
3
4
8 Q1
7 nQ1
6 VCCO
5 Q0
ICS843-75
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
ICS843-75
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
843AG-75
www.icst.com/products/hiperclocks.html
1
REV. A JANUARY 9, 2006
1 page  
Integrated
Circuit
Systems, Inc.
ICS843-75
75MHZ, LVCMOS, LVPECL
DUAL OUTPUT OSCILLATOR
PARAMETER MEASUREMENT INFORMATION
1.65V ± 0.15V
VCC,
VCCO
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GND
-1.65V ± 0.15V
SCOPE
Qx
2V
VCC,
VCCO
LVPECL
VEE
-1.3V ± 0.3V
SCOPE
Qx
nQx
3.3V LVCMOS OUTPUT LOAD AC TEST CIRCUIT
3.3V LVPECL OUTPUT LOAD AC TEST CIRCUIT
V
CC
Q0 2
t PW
t
PERIOD
odc = t PW x 100%
t PERIOD
nQ1
Q1
t PW
t
PERIOD
odc = t PW x 100%
t PERIOD
LVCMOS OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
LVPECL OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
20%
Clock
Outputs
80%
tR
80%
tF
20%
Clock
20%
Outputs
80%
tR
80%
tF
VSW I N G
20%
LVCMOS OUTPUT RISE/FALL TIME
843AG-75
LVPECL OUTPUT RISE/FALL TIME
www.icst.com/products/hiperclocks.html
5
REV. A JANUARY 9, 2006
5 Page 
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP
ICS843-75
75MHZ, LVCMOS, LVPECL
DUAL OUTPUT OSCILLATOR
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
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TABLE 8A. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N8
A -- 1.20
A1 0.05 0.15
A2 0.80 1.05
b 0.19 0.30
c 0.09 0.20
D 2.90 3.10
E 6.40 BASIC
E1 4.30 4.50
e 0.65 BASIC
L 0.45 0.75
α 0° 8°
aaa -- 0.10
Reference Document: JEDEC Publication 95, MO-153
TABLE 8B. PACKAGE DIMENSIONS
SYMBOL
Millimeters
MINIMUM
MAXIMUM
N8
A 1.35 1.75
A1 0.10 0.25
B 0.33 0.51
C 0.19 0.25
D 4.80 5.00
E 3.80 4.00
e 1.27 BASIC
H 5.80 6.20
h 0.25 0.50
L 0.40 1.27
α 0° 8°
Reference Document: JEDEC Publication 95, MS-012
843AG-75
www.icst.com/products/hiperclocks.html
11
REV. A JANUARY 9, 2006
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ICS843-75.PDF ] | |
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