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PDF ICS8543 Data sheet ( Hoja de datos )

Número de pieza ICS8543
Descripción 1-TO-4 LVDS FANOUT BUFFER
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! ICS8543 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8543
LOW SKEW, 1-TO-4
LVDS FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8543 is a low skew, high performance
,&6 1-to-4 clock fanout buffer and a member of
HiPerClockS™ the HiPerClockS™ family of High Performance
Clock Solutions from ICS. Utilizing Low Voltage
Differential Signaling (LVDS) the ICS8543
provides a low power, low noise, solution for distributing clock
signals over controlled impedances of 100. The ICS8543
accepts any differential input level and translates it to 3.3V
LVDS output levels.
Guaranteed output and part-to-part skew characteristics
www.DmataakSehetheet4UIC.cSo8m543 ideal for those applications demanding
well defined performance and repeatability.
FEATURES
4 LVDS outputs
Designed to meet or exceed the requirements of ANSI
TIA/EIA-644
Selectable differential HSTL or LVPECL clock inputs
LVCMOS / LVTTL control inputs
3.3V operating supply
20 lead TSSOP
0°C to 70°C ambient operating temperature
BLOCK DIAGRAM
CLK_EN
HCLK
nHCLK
PCLK
nPCLK
CLK_SEL
0
1
nD
Q
LE
OE
PIN ASSIGNMENT
VEE 1 20 Q0
CLK_EN 2 19 nQ0
CLK_SEL 3 18 VDD
HCLK 4 17 Q1
Q0 nHCLK 5 16 nQ1
nQ0 PCLK 6 15 Q2
nPCLK 7 14 nQ2
Q1 OE 8 13 VEE
nQ1 VEE 9 12 Q3
Q2 VDD 10 11 nQ3
nQ2
ICS8543
Q3
nQ3 20-Lead TSSOP
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
ICS8543BG
www.icst.com/products/hiperclocks.html
REV. C MAY 21, 2001
1

1 page




ICS8543 pdf
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8543
LOW SKEW, 1-TO-4
LVDS FANOUT BUFFER
TABLE 4D. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol
VIH
VIL
IIH
IIL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
CLK_EN, CLK_SEL, OE
CLK_EN, CLK_SEL, OE
CLK_EN, OE
CLK_SEL
CLK_EN, OE
CLK_SEL
Test Conditions
Minimum
2
-150
-5
Typical
Maximum
0.8
5
150
Units
V
V
µA
µA
µA
µA
www.DataSheet4U.com
TABLE 4E. LVDS DC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol
VOD
VOD
VOS
VOS
IOZ
IOFF
IOSD
IOS
Parameter
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
High Impedance Leakage Current
Power Off Leakage
Differential Output Short Circuit Current
Output Short Circuit Current
Test Conditions
Minimum
250
1.125
-10
-20
Typical
350
4
1.25
5
±1
±1
3.0
3.0
Maximum
450
35
1.375
25
+10
+20
Units
mV
mV
V
mV
µA
µA
mA
mA
TABLE 5. AC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
fMAX
Maximum Input Frequency
650
tpLH
Propagation Delay, Low-to-High 0 f 650MHz
1.8
2.4
tsk(o)
Output Skew; NOTE 2
50
tsk(pp) Part-to-Part Skew; NOTE 3
300
tR Output Rise Time
tF Output Fall Time
tPW Output Pulse Width
RL = 100
200 400
600
RL = 100
200 400
600
tCYCLE/2 - TBD
tCYCLE/2 + TBD
tEN Output Enable Time
TBD
tDIS Output Disable Time
TBD
NOTE 1: All parameters measured at fMAX unless noted otherwise.
NOTE 2: Defined as skew across outputs at the same supply voltages and with equal load conditions.
Measured from the 50% point of the input to the differential output crossing point.
NOTE 3: Defined as skew at different outputs on different devices operating at the same supply voltages
and with equal load conditions. Measured from 50% of like inputs to the differential output crossing point.
Units
MHz
ns
ps
ps
ps
ps
ns
ns
ns
ICS8543BG
www.icst.com/products/hiperclocks.html
5
REV. C MAY 21, 2001

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