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PDF PCF8562 Data sheet ( Hoja de datos )

Número de pieza PCF8562
Descripción Universal LCD driver
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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PCF8562
www.DataSheet4U.com
Universal LCD driver for low multiplex rates
Rev. 3 — 2 December 2008
Product data sheet
1. General description
The PCF8562 is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD) with low multiplex rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up to 32 segments. The PCF8562
is compatible with most microprocessors or microcontrollers and communicates via a
two-line bidirectional I2C-bus. Communication overheads are minimized by a display RAM
with auto-incremented addressing, by hardware subaddressing and by display memory
switching (static and duplex drive modes).
AEC-Q100 compliant (PCF8562TT/S400) for automotive applications.
2. Features
I Single chip LCD controller and driver
I Selectable backplane drive configuration: static or 2, 3, 4 backplane multiplexing
I Selectable display bias configuration: static, 12 or 13
I Internal LCD bias generation with voltage-follower buffers
I 32 segment drives:
N Up to sixteen 7-segment numeric characters
N Up to eight 14-segment alphanumeric characters
N Any graphics of up to 128 elements
I 32 × 4-bit RAM for display data storage
I Auto-incremented display data loading across device subaddress boundaries
I Display memory bank switching in static and duplex drive modes
I Versatile blinking modes
I Independent supplies possible for LCD and logic voltages
I Wide power supply range: from 1.8 V to 5.5 V
I Wide logic LCD supply range:
N From 2.5 V for low-threshold LCDs
N Up to 6.5 V for guest-host LCDs and high-threshold twisted nematic LCDs
I Low power consumption
I 400 kHz I2C-bus interface
I No external components
I Manufactured in silicon gate CMOS process

1 page




PCF8562 pdf
NXP Semiconductors
PCF8562www.DataSheet4U.com
Universal LCD driver for low multiplex rates
Table 3. Pin description …continued
Symbol
Pin Description
VLCD
21 LCD supply voltage
BP0 to BP3
22 to 25 LCD backplane outputs
S0 to S22,
S23 to S31
26 to 48, LCD segment outputs
1 to 9
7. Functional description
The PCF8562 is a versatile peripheral device designed to interface any
microprocessor or microcontroller with a wide variety of LCDs. It can directly drive any
static or multiplexed LCD containing up to four backplanes and up to 32 segments.
The possible display configurations of the PCF8562 depend on the number of active
backplane outputs required. A selection of display configurations is shown in Table 4. All
of these configurations can be implemented in the typical system shown in Figure 3.
Table 4. Display configurations
Number of:
7-segment numeric 14-segment numeric
Backplanes Segments Digits Indicator
symbols
Characters Indicator
symbols
4 128 16 16 8 16
3 96 12 12 6 12
2 64 8 8 4 8
1 32 4 4 2 4
Dot matrix
128 dots (4 × 32)
96 dots (3 × 32)
64 dots (2 × 32)
32 dots (1 × 32)
VDD
R
tr
2Cb
HOST
MICRO-
PROCESSOR/
MICRO-
CONTROLLER
VSS
SDA 10
VDD VLCD
14 21
32 segment drives
SCL 11
OSC
15
PCF8562
4 backplanes
16 17 18 19 20
A0 A1 A2 SA0 VSS
LCD PANEL
(up to 128
elements)
001aac264
The resistance of the power lines must be kept to a minimum.
Fig 3. Typical system configuration
The host microprocessor or microcontroller maintains the 2-line I2C-bus communication
channel with the PCF8562. The internal oscillator is enabled by connecting
pin OSC to pin VSS. The appropriate biasing voltages for the multiplexed LCD waveforms
are generated internally. The only other connections required to complete the system are
to the power supplies (VDD, VSS and VLCD) and the LCD panel chosen for the application.
7.1 Power-on reset
At power-on the PCF8562 resets to the following starting conditions:
PCF8562_3
Product data sheet
Rev. 3 — 2 December 2008
© NXP B.V. 2008. All rights reserved.
5 of 36

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PCF8562 arduino
NXP Semiconductors
PCF8562www.DataSheet4U.com
Universal LCD driver for low multiplex rates
7.4.3 1:3 Multiplex drive mode
When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies
(see Figure 7).
BP0
BP1
BP2
Sn
Sn+1
Sn+2
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
state 1
state 2
VLCD
2VLCD / 3
VLCD / 3
0V
VLCD / 3
2VLCD / 3
VLCD
VLCD
2VLCD / 3
VLCD / 3
0V
VLCD / 3
2VLCD / 3
VLCD
Tfr
LCD segments
state 1
state 2
(a) Waveforms at driver.
(b) Resultant waveforms
at LCD segment.
mgl748
(1) Vstate1(t) = VSn(t) VBP0(t).
(2) Von(RMS) = 0.638VLCD.
(3) Vstate2(t) = VSn+1(t) VBP1(t).
(4) Voff(RMS) = 0.333VLCD.
Fig 7. Waveforms for the 1:3 multiplex drive mode with 13 bias
PCF8562_3
Product data sheet
Rev. 3 — 2 December 2008
© NXP B.V. 2008. All rights reserved.
11 of 36

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