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PDF LM3203 Data sheet ( Hoja de datos )

Número de pieza LM3203
Descripción Step-Down DC-DC Converter
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! LM3203 Hoja de datos, Descripción, Manual

July 2005
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LM3203
Step-Down DC-DC Converter with Bypass Mode for
CDMA / WCDMA RF Power Amplifiers
General Description
The LM3203 is a DC-DC converter optimized for powering
RF power amplifiers (PAs) from a single Lithium-Ion cell.
However, they may be used in many other applications. It
steps down an input voltage of 2.7V to 5.5V to an adjustable
output voltage of 0.8V to 3.6V. The output voltage is set
using a VCON analog input and external resistor dividers for
optimizing efficiency of the RF PA at various power levels.
The LM3203 offers 3 modes for mobile phones and similar
RF PA applications. Fixed-frequency PWM mode minimizes
RF interference. Bypass mode turns on an internal bypass
switch to power the PA directly from the battery. Shutdown
mode turns the device off and reduces battery consumption
to 0.1µA (typ.).
The LM3203 is available in a 10-pin lead free micro SMD
package. A high switching frequency (2MHz) allows use of
tiny surface-mount components.
Features
n 2MHz (typ.) PWM Switching Frequency
n Operates from a single Li-Ion cell (2.7V to 5.5V)
n Adjustable Output Voltage (0.8V to 3.6V)
n 500mA Maximum load capability (PWM and Bypass
mode)
n PWM / Forced Bypass Mode
n Low RDSON Bypass FET: 85m(typ.)
n High Efficiency (96% typ. at 3.6VIN, 3.2VOUT at 150mA)
n Fast Turn-on time when Enabled (50µs typ.), 3GPP
Compliant
n 10-pin micro SMD Package
n Current Overload Protection
n Thermal Overload Protection
Applications
n Cellular Phones
n Hand-Held Radios
n RF PC Cards
n Battery Powered RF Devices
Typical Application
© 2005 National Semiconductor Corporation DS201416
20141601
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LM3203 pdf
Typical Performance Characteristics (Circuit in Figure 1, PVIN = VDD = EN = 3.6V, BYP = 0V, TA =
25˚C, unless otherwise noted)
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Quiescent Current vs Supply Voltage
(VCON = 0.267V, FB = 2V, No Load)
Shutdown Current vs Temperature
(EN = 0V)
20141604
Switching Frequency Variation vs Temperature
(VOUT = 1.5V, IOUT = 200 mA)
20141605
Output Voltage vs Supply Voltage
(VOUT = 1.5V, VCON = 0.5V)
20141606
Output Voltage vs Temperature
(VIN = 3.6V, VOUT = 1.5V, VCON = 0.5V)
20141607
Output Voltage vs Temperature
(VIN = 4.2V, VOUT = 3.4V, VCON = 1.13V)
20141608
5
20141609
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LM3203 arduino
Operation Description (Continued)
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20141636
FIGURE 1. Typical Operating System Circuit where baseband controls the output voltage using a DAC
Circuit Operation
Referring to Figure 1, the LM3203 operates as follows. Dur-
ing the first part of each switching cycle, the control block in
the LM3203 turns on the internal PFET (P-channel MOS-
FET) switch. This allows current to flow from the input
through the inductor to the output filter capacitor and load.
The inductor limits the current to a ramp with a slope of
around ( VIN - VOUT ) / L, by storing energy in a magnetic
field. During the second part of each cycle, the controller
turns the PFET switch off, blocking current flow from the
input, and then turns the NFET (N-channel MOSFET) syn-
chronous rectifier on. In response, the inductor’s magnetic
field collapses, generating a voltage that forces current from
ground through the synchronous rectifier to the output filter
capacitor and load. As the stored energy is transferred back
into the circuit and depleted, the inductor current ramps
down with a slope around VOUT / L. The output filter capaci-
tor stores charge when the inductor current is going high,
and releases it when inductor current is going low, smooth-
ing the voltage across the load.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated
rectangular wave formed by the switch and synchronous
rectifier at SW to a low-pass filter formed by the inductor and
output filter capacitor. The output voltage is equal to the
average voltage at the SW pin.
PWM Mode
While in PWM (Pulse Width Modulation) mode, the output
voltage is regulated by switching at a constant frequency
and then modulating the energy per cycle to control power to
the load. Energy per cycle is set by modulating the PFET
switch on-time pulse width to control the peak inductor cur-
rent. This is done by comparing the PFET drain current to a
slope-compensated reference current generated by the error
amplifier. At the beginning of each cycle, the clock turns on
the PFET switch, causing the inductor current to ramp up.
When the current sense signal ramps past the error amplifier
signal, the PWM comparator turns off the PFET switch and
turns on the NFET synchronous rectifier, ending the first part
of the cycle. If an increase in load pulls the output down, the
error amplifier output increases, which allows the inductor
current to ramp higher before the comparator turns off the
PFET. This increases the average current sent to the output
and adjusts for the increase in the load. The minimum on-
time of PFET in PWM mode is 50ns (typ.).
Bypass Mode
The LM3203 contains an internal PFET switch for bypassing
the PWM DC-DC converter during Bypass mode. In Bypass
mode, this PFET is turned on to power the PA directly from
the battery for maximum RF output power. Bypass mode is
more efficient than operating in PWM mode at 100% duty
cycle because the resistance of the bypass PFET is less
than the series resistance of the PWM PFET and inductor.
This translates into higher voltage available on the output in
Bypass mode, for a given battery voltage. The part can be
placed in bypass mode by sending BYP pin high. It remains
in bypass mode until BYP pin goes low.
It is recommended to connect BYPOUT pin directly to the
output capacitor with a separate trace and not to the FB pin.
Connect the BYPOUT pin to the VDD pin when Bypass mode
is not required.
If VCON is less than approx. 0.15V, the Bypass FET is turned
off.
Operating Mode Selection Control
The LM3203 is designed for digital control of the operating
modes using the BYP pin. Setting the BYP pin high (>1.2V)
places the device in Bypass mode. Setting BYP pin low
(<0.4V) forces operation in PWM mode.
Bypass and PWM operation overlap during the transition
between the two modes. This transition time is approxi-
mately 31µs when changing from PWM to Bypass mode,
and 15µs when changing from Bypass to PWM mode. This
helps prevent under or overshoots during the transition pe-
riod between PWM and Bypass modes.
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