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PDF PE9313 Data sheet ( Hoja de datos )

Número de pieza PE9313
Descripción 1500 MHz Low Power UltraCMOS Divide-by-8 Prescaler RAD hard for Space Applications
Fabricantes Peregrine Semiconductor 
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Product Description
The PE9313 is a high-performance static UltraCMOS™
prescaler with a fixed divide ratio of 8. Its operating frequency
range is DC to 1500 MHz. The PE9313 operates on a nominal
3 V supply and draws only 6.5 mA. It is packaged in a small 8-
lead ceramic SOIC and is ideal for frequency scaling and clock
generation solutions.
The PE9313 is manufactured in Peregrine’s patented Ultra-
Thin Silicon (UTSi®) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Product Swpwwe.DcaitafSihceeat4tUi.oconm
PE9313
1500 MHz Low Power UltraCMOS™
Divide-by-8 Prescaler
Rad hard for Space Applications
Features
DC to 1500 MHz operation
Fixed divide ratio of 8
Low-power operation: 6.5 mA typical
@3V
Ultra small package: 8-lead Ceramic
SOIC
Guaranteed 100Krads(Si) Total Dose
Performance
Superior Single Event Upset Immunity
Figure 1. Functional Diagram
IN
Pre-Amp
DQ
CLK QB
DQ
CLK QB
DQ
CLK QB
Output
Buffer
OUT
Figure 2. Package Type
8-lead CSOIC
Table 1. Electrical Specifications @ +25 °C, VDD = 2.6 V (ZS = ZL = 50 )
VDD = 3.0 V, -40° C TA 85° C, unless otherwise specified
Parameter
Conditions
Minimum
Typical
Supply Voltage
2.85 3.0
Supply Current
6.5
Input Frequency (Fin)
DC
Input Power (Pin)
Output Power (Pout)
DC < Fin 1000 MHz
1000 < Fin 1500 MHz
DC < Fin 1500 MHz
-8
0
0
Maximum
3.15
11
1500
+10
+10
Units
V
mA
MHz
dBm
dBm
dBm
Document No. 70-0120-02 www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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PE9313 pdf
PE9313
Product Specification
Evaluation Kit Operation
The Ceramic SOIC Prescaler Evaluation Board was
designed to help customers evaluate the PE9313
divide-by-8 prescaler. On this board, the device
input (pin 2) is connected to the SMA connector J1
through a 50 transmission line. A series capacitor
(C3) provides the necessary DC block for the device
input. A value of 1000 pF was used for the
evaluation board; other applications may require a
different value. It is also possible to place a 0
resistor in this location for very low frequency
applications.
The device output (pin 7) is connected to SMA
connector J3 through a 50 transmission line. A
series capacitor (C1) provides the necessary DC
block for the device output. This capacitor value
must be chosen to have a low impedance at the
desired output frequency of the device. A value of
1000 pF was chosen for the evaluation board.
The board is constructed of a two-layer FR4 material
with a total thickness of 0.031”. The bottom layer
provides ground for the RF transmission lines. The
transmission lines were designed using a coplanar
waveguide above ground plane model with trace
width of 0.030”, trace gaps of 0.0061”, dielectric
thickness of 0.028”, metal thickness of 0.0014”, and
εr of 4.6. Note that the predominate mode of these
transmission lines is coplanar waveguide.
J2 provides DC power to the device via pin 1. Two
decoupling capacitors (C2=100 pF, C10=1000 pF)
are included on this trace. It is the responsibility of
the customer to determine proper supply decoupling
for their design application.
www.DataSheet4U.com
Figure 8. Evaluation Board Layout
Peregrine specification 102/0034
Figure 9. Evaluation Board Schematic
Peregrine specification 102/0202
Document No. 70-0120-02 www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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