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PDF PE9308 Data sheet ( Hoja de datos )
| Número de pieza | PE9308 | |
| Descripción | 13.5 GHz Low Power UltraCMOS Divide-by-4 Prescaler for RAD-Hard Space Applications | |
| Fabricantes | Peregrine Semiconductor | |
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Product Description
The PE9308 is a high-performance dynamic UltraCMOS™
prescaler ideal for Ku band Transceiver applications. It has a
fixed divide ratio of 4 with an operating frequency range of 4.0
GHz to 13.5 GHz. The PE9308 operates on a nominal 2.6 V
supply and draws only 15 mA. It is packaged in a small 8-lead
Flat Pack and is also available in Die form for Hybrid
application.
The PE9308 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi©) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Advance wInwwf.oDartamSheaett4iUo.cnom
PE9308
13.5 GHz Low Power UltraCMOS™
Divide-by-4 Prescaler for
RAD-Hard Space Applications
Features
• High-frequency operation: up to 13.5 GHz
• Fixed divide ratio of 4
• Low-power operation:15 mA typical @ 2.6V
• SEL Immune due to UltraCMOS™
• SEU <10-10 errors / bit-day
• 100 Krads (Si) Total Dose
• Small package: 8-lead Formed Flat pack
• Available as Die
Figure 1. Functional Schematic Diagram
Figure 2. Package Type
8-lead CSOIC
D SET Q
D SET Q
IN Q Q
CLR CLR
OUT
Output Buffer
Table 1. Electrical Specifications (ZS = ZL = 50 Ω)
VDD = 2.45< VDD <2.75 V, -40° C ≤ TA ≤ 85° C, unless otherwise specified
Parameter
Conditions
Minimum
Frequency
4000
Supply Voltage
2.45
Supply Current
8
SSB Phase noise (PhN)
100 KHz Offset; Pin=0dBm
Input Power (Pin)
Output Power (Pout)
7.0 GHz ≤ Fin ≤ 10.0 GHz
4.0 GHz < Fin ≤ 7.0 GHz
4.0 GHz ≤ Fin ≤ 10.0 GHz
0
+5
0
Typical
2.6
15
-120
Maximum
13,500
2.75
20
+10
+10
Units
MHz
V
mA
dBc/Hz
dBm
dBm
dBm
Document No. 70-0187-01 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
1 page  
PE9308
Advance Information
Evaluation Kit
The Ceramic SOIC Prescaler Evaluation Board
was designed to help customers evaluate the
PE9308 divide-by-4 prescaler. On this board, the
device input (pin 3) is connected to the SMA
connector J2 through a 50 Ω transmission line.
The device output (pin 6) is connected to SMA
connector J3 through a 50 Ω transmission line.
J1 provides DC power to the device via pin
1,2,4,5,7,8.Multiple decoupling capacitors
(C4,5,8,9=10pF, C3,6,7,10=0.01uF) are used. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. The board is constructed using 4
layers. The top and bottom layers are comprised
of Rogers low loss 4350 material having a core
thickness of 0.010"; while the internal layers are
comprised of FR-4. The overall board thickness is
0.062".
Applications Support
If you have a problem with your evaluation kit or if
you have applications questions call (858) 731-
9400 and ask for applications support. You may
also contact us by fax or e-mail:
Fax: (858) 731-9499
E-Mail: [email protected]
www.DataSheet4U.com
Figure 8. Evaluation Board Layouts
Peregrine Specification 101/0186
Figure 9. Evaluation Board Schematic
Peregrine Specification 102/0247
Document No. 70-0187-01 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PE9308.PDF ] | |
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