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PDF RMPA5251 Data sheet ( Hoja de datos )

Número de pieza RMPA5251
Descripción 4.90-5.85 GHz InGaP HBT Linear Power Amplifier
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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October 2004
RMPA5251
4.90–5.85 GHz InGaP HBT Linear Power Amplifier
General Description
The RMPA5251 power amplifier is designed for high
performance WLAN applications in the 4.9 to 5.35 and 5.15
to 5.85 GHz frequency bands. The low profile 16 pin 3 x 3
x 0.9 mm package with internal matching on both input and
output to 50minimizes next level PCB space and allows
for simplified integration. The on-chip detector provides
power sensing capability while the logic control provides
power saving shutdown options. The PA’s low power
consumption and excellent linearity are achieved using our
InGaP Heterojunction Bipolar Transistor (HBT) technology.
Features
• 4.9 to 5.85 GHz Operation
• 27dB small signal gain
• 26dBm output power @ 1dB compression
• 2.5% EVM at 18.0dBm modulated power out
• 3.3V single positive supply operation
• Adjustable bias current operation
• Two power saving shutdown options (bias and logic
control)
• Integrated power detector with >18dB dynamic range
• Low profile 16 pin 3 x 3 x 0.9 mm standard QFN leadless
package
• Internally matched to 50
• Minimal external components
Device
• Optimized for use in IEEE 802.11a
WLAN applications
Electrical Characteristics1,3 802.11a OFDM
Modulation (with 176ms burst time, 100ms idle time) 54Mbps Data Rate, 16.7 MHz Bandwidth
Parameter
Frequency10
Minimum Typical
4.90
Supply Voltage
3.0 3.3
Gain
27
Total Current @ 18dBm POUT
Total Current @ 19dBm POUT
EVM @ 18dBm POUT2
EVM @ 19dBm POUT2
Detector Output @ 19dBm POUT
Detector Threshold4
POUT Spectral Mask Compliance5, 6
250
260
2.5
3.5
450
5.0
21.0
Electrical Characteristics1 Single Tone
Maximum
5.35
3.6
Minimum
5.15
3.0
Typical
3.3
28
240
250
2.5
3.5
500
5.0
20.0
Maximum
5.85
3.6
Unit
GHz
V
dB
mA
mA
%
%
mV
dBm
dBm
Parameter
Frequency10
Supply Voltage
Gain7
Total Quiescent Current7, 11
Minimum
4.90
3.0
Typical
3.3
27
140–220
Maximum
5.35
3.6
Minimum
5.15
3.0
Typical
3.3
27.5
140–220
Maximum
5.85
3.6
Unit
GHz
V
dB
mA
Notes:
1. VC1, VC2, VC3, VM1, VM2, VM3 = 3.3 Volts, Tc=25°C, PA is constantly biased, 50system.
2. Percentage includes system noise floor of EVM=0.8%.
3. Not measured 100% in production.
4. POUT measured at PIN corresponding to power detection threshold.
5. Measured at PIN at which Spectral Mask Compliance is satisfied. Two-sample windowing length applied.
6. PIN is adjusted to point where performance approaches spectral mask requirements.
7. 100% Production screened.
8. Bias Current is included in the total quiescent current.
9. VL is set to logic level for device off operation.
10. See Application information on Page 3.
11. See Data on Page 8.
©2004 Fairchild Semiconductor Corporation
RMPA5251 Rev. D

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RMPA5251 pdf
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RMPA5251 5.15 to 5.85 GHz Operation Eval Board BOM (High Band)
No. Ref Value Unit Qty Size Description
MFG
Part No.
Comments
1 C1,C2 10 µF 2 0805 10 µF Capacitor Murata
GRM21BR60J106K
Decoupling
Capacitor
2 C4 100 pF 1 0402 100 pF Capacitor Murata
GRM1885C1H101JA01D Detector
Capacitor
3 R1,R2 10K 2 0402 10 KResistor
4 L1,L3 10 nH 2 0402 10 nH Inductor
IMS
Toko
RCI-0402-1002J
LLV1005FB10NJ
Detector Resistor
RF Choke
5 L2 15 nH 1 0402 15 nH Inductor Toko
LLV1005FB15NJ
RF Choke
6 B1
1
Fixture Board
Crown Circuits G657432
7 J1,J2
2
Jack End Launch Johnson
142-0701-841
SMA
Components
8 J3
11 Right Angle Single Digikey
Header
S1322-12-ND
9 A1
1
Packaged MMIC Fairchild
RMPA5251
Evaluation Board Layout
VL
*
J1 L1
C1
L2
C3 L3
R1
C2
R2
C4
A1
J2
J3
= component
Actual Board Size = 2.0" x 1.5"
Not Used
= Jumper/short connection
* VL is labeled P1 on Eval Board
Evaluation Board Operation
Recommended turn-on sequence:
1) Connect RF ports J1, J2 to RF test equipment.
2) Connect common ground terminal to the Ground (GND) pin on the board.
3) Connect logic control pin VL to positive supply.
4) Connect terminals VC1, VC2 and VC3 together and connect to positive supply (VC).
5) Connect terminals VM1, VM2 and VM3 together and connect to positive supply (VM).
6) Connect voltmeter to Detector Output, pin DT1.
7) Connect pin DT2 to ground.
8) Apply high voltage of +2.4V to logic control pin VL. (On)
9) Apply positive voltage of 3.3V to VC1, VC2 and VC3 (first, second and third stage collector).
10) Apply positive voltage of 3.3V to VM1, VM2 and VM3 (bias networks)2.
11) At this point, you should expect to observe the following positive currents flowing into the pins:
Pin
VL
VC (Total)
VM (Total)
Current
~150 µA
~184 mA
~16 mA
©2004 Fairchild Semiconductor Corporation
RMPA5251 Rev. D

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