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PDF LM2744 Data sheet ( Hoja de datos )
| Número de pieza | LM2744 | |
| Descripción | Low Voltage N-Channel MOSFET Synchronous Buck Regulator Controller with External Reference | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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ADVANCE INFORMATION
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LM2744
Low Voltage N-Channel MOSFET Synchronous Buck
Regulator Controller with External Reference
General Description
The LM2744 is a high-speed synchronous buck regulator
controller with an externally adjustable reference voltage
(between 0.5V to 1.5V). It can provide simple down conver-
sion to output voltages as low as 0.5V. Though the control
sections of the IC are rated for 3 to 6V, the driver sections
are designed to accept input supply rails as high as 16V. The
use of adaptive non-overlapping MOSFET gate drivers helps
avoid potential shoot-through problems while maintaining
high efficiency. The IC is designed for the more cost-effective
option of driving only N-channel MOSFETs in both the high-
side and low-side positions. It senses the low-side switch
voltage drop for providing a simple, adjustable current limit.
The fixed-frequency voltage-mode PWM control architecture
is adjustable from 50 kHz to 1 MHz with one external resis-
tor. This wide range of switching frequency gives the power
supply designer the flexibility to make better tradeoffs be-
tween component size, cost and efficiency.
Features include soft-start, input undervoltage lockout
(UVLO) and Power Good (based on both undervoltage and
overvoltage detection). In addition, the shutdown pin of the
IC can be used for providing startup delay, and the soft-start
pin can be used for implementing precise tracking, for the
purpose of sequencing with respect to an external rail.
Features
n Power stage input voltage from 1V to 16V
n Control stage input voltage from 3V to 6V
n Output voltage adjustable down to 0.5V
n Power good flag and shutdown
n Output overvoltage and undervoltage detection
n External reference voltage 0.5V to 1.5V
n Low-side adjustable current sensing
n Adjustable soft-start
n Tracking and sequencing with shutdown and soft start
pins
n Switching frequency from 50 kHz to 1 MHz
n TSSOP-14 package
Applications
n 3.3V Buck Regulation
n Cable Modem, DSL and ADSL
n Laser Jet and Ink Jet Printers
n Low Voltage Power Modules
n DSP, ASIC, Core and I/O
Typical Application
© 2004 National Semiconductor Corporation DS201060
20106001
www.national.com
1 page  
Typical Performance Characteristics
Efficiency (VOUT = 1.2V, VREF = 0.6V)
VCC = 3.3V, FSW = 300kHz
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Efficiency (VOUT = 2.5V, VREF = 0.8V)
VCC = 3.3V, FSW = 300kHz
20106040
Efficiency (VOUT = 3.3V, VREF = 1.2V)
VCC = 5V, FSW = 300kHz
20106057
Output Voltage vs Temperature
20106041
VCC Operating Current plus BOOT Current vs Frequency
FDS6898A FET (TA = 25˚C)
20106090
BOOT Pin Current vs Temperature for
BOOT Voltage = 3.3V
FSW = 300kHz, FDS6898A FET, No-Load
20106045
5
20106043
www.national.com
5 Page 
Application Information (Continued)
www.DataSheet4U.com
20106014
FIGURE 4. Sequencing Circuit
A desired delay time tDELAY between the startup of the
master supply output voltage and the LM2744 output voltage
can be set based on the SD pin low-to-high threshold VSD-IH
and the slew rate of the voltage at the SD pin, SRSD:
tDELAY = VSD-IH / SRSD
Note again, that in Figure 4, the LM2744’s output voltage
has been represented symbolically as VOUT2, i.e. without
explicitly showing the power components.
VSD-IH is typically 1.08V and SRSD is the slew rate of the SD
pin voltage. The values of the sequencing divider resistors
RS1 and RS2 set the SRSD based on the master supply
output voltage slew rate, SROUT1, using the following equa-
tion:
FIGURE 5. Delay for Sequencing
20106011
SD PIN IMPEDANCE
When connecting a resistor divider to the SD pin of the
LM2744 some care has to be taken. Once the SD voltage
goes above VSD-IH, a 17 µA pull-up current is activated as
shown in Figure 6. This current is used to create the internal
hysteresis ()170mV); however, high external impedances
will affect the SD pin logic thresholds as well. The external
impedance used for the sequencing divider network should
preferably be a small fraction of the impedance of the SD pin
for good performance (around 1kΩ).
For example, if the master supply output voltage slew rate
was 1V/ms and the desired delay time between the startup
of the master supply and LM2744 output voltage was 5ms,
then the desired SD pin slew rate would be (1.08V/5ms) =
0.216V/ms. Due to the internal impedance of the SD pin, the
maximum recommended value for RS2 is 1kΩ. To achieve
the desired slew rate, RS2 would then be 274Ω. A timing
diagram for this example is shown in Figure 5.
FIGURE 6. SD Pin Logic
20106006
MOSFET GATE DRIVERS
The LM2744 has two gate drivers designed for driving
N-channel MOSFETs in a synchronous mode. Note that
unlike most other synchronous controllers, the bootstrap
capacitor of the LM2744 provides power not only to the
driver of the upper MOSFET, but the lower MOSFET driver
11 www.national.com
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet LM2744.PDF ] | |
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