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PDF ICS181-03 Data sheet ( Hoja de datos )
| Número de pieza | ICS181-03 | |
| Descripción | Low EMI Clock Generator | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS181-03 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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ICS181-03
Low EMI Clowcwkw.DGataeSnheeetr4Ua.ctoomr
Description
The ICS181-03 generates a low EMI output clock from
a clock or crystal input. The device uses ICS’
proprietary mix of analog and digital Phase-Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
The ICS181-03 offers down spread selection of -1.25%
and -3.75%. Refer to the MK1714-01/02 for the widest
selection of input frequencies and multipliers.
ICS offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
Features
• Pin and function compatible to Cypress W181-03
• Packaged in 8-pin SOIC
• Provides a spread spectrum output clock
• Accepts a clock input and provides same frequency
dithered output
• Input frequency of 46 to 75 MHz for Clock input
• Peak reduction by 7dB - 14dB typical on 3rd - 19th
odd harmonics
• Spread percentage selection for -1.25% and -3.75%
• Operating voltage of 3.3 V and 5 V
• Advanced, low-power CMOS process
Block Diagram
VDD
FS1
SSON#
SS%
CLK
Clock Buffer
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
CLK
GND
MDS 181-03 A
1
Revision 110404
Integrated Circuit Systemsl525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
1 page  
ICS181-03
LOW EMI CLOCK GENERATOR
www.DataSheet4U.com
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V±5% or 5 V±10%, Ambient Temperature 0 to +70° C, CL=15 pf
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input/Output Clock Frequency
46 75 MHz
Input Clock Duty Cycle
Time above VDD/2
40
60 %
Output Clock Duty Cycle
Note 1
40 50 60 %
Output Rise Time
Output Fall Time
Jitter
tOR 0.8 to 2.4 V, note 1
tOF 2.4 to 0.8 V, note 1
Cycle-to-cycle
2 5 ns
2 5 ns
250 300 ps
Note 1: Measured with 15 pF load
Thermal Characteristics
Parameter
Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
150
140
θJA 3 m/s air flow
120
Thermal Resistance Junction to Case θJC
40
Marking Diagram
85
Notes:
1. ###### is the lot number.
°C/W
°C/W
°C/W
°C/W
181M-03
######
YYWW
2. YYWW is the last two digits of the year and week
that the part was assembled.
3. “LF” denotes Pb (lead) free package.
4. Bottom marking: country of origin.
14
Marking Diagram (Pb free)
85
181M03LF
######
YYWW
14
MDS 181-03 A
5
Revision 110404
Integrated Circuit Systemsl 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201l www.icst.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet ICS181-03.PDF ] | |
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