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Número de pieza | RD74LVC138B | |
Descripción | 3-to-8-line Decoder / Demultiplexer | |
Fabricantes | Renesas Technology | |
Logotipo | ||
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No Preview Available ! RD74LVC138B
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3-to-8-line Decoder / Demultiplexer
REJ03D0502–0200
Rev.2.00
Jan. 14, 2005
Description
The RD74LVC138B has three binary select inputs in a 16 pin package. If the device is enabled these inputs determine
which one of the eight normally high outputs will go low. Two active low and one active high enables are provided to
ease the cascading of decoders. Low voltage and high-speed operation is suitable at the battery drive product (note type
personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• VCC = 1.65 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
RD74LVC138BFPEL
RD74LVC138BTELL
SOP–16 pin (JEITA)
TSSOP–16 pin
FP–16DAV
TTP–16DAV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
Enable
G1 G2A G2B C
XXHX
XHXX
L XXX
HL L L
HL L L
HL L L
HL L L
HL L H
HL L H
HL L H
HL L H
H: High level
L: Low level
X: Immaterial
Select
BA
XX
XX
XX
LL
LH
HL
HH
LL
LH
HL
HH
Outputs
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
HHHHHHHH
HHHHHHHH
HHHHHHHH
L HHHHHHH
HL HHHHHH
HHL HHHHH
HHHL HHHH
HHHHL HHH
HHHHHL HH
HHHHHHL H
HHHHHHHL
Rev.2.00 Jan. 14, 2005 page 1 of 7
1 page RD74LVC138B
Switching Characteristics
Ta = –40 to 85°C
Item
Symbol VCC (V)
Min
Typ
Max
Propagation delay time
tPLH
tPHL
1.8±0.15 1.0
2.5±0.2 1.0
—
—
22.0
9.9
2.7
1.0 —
7.9
3.3±0.3 1.0
—
6.7
5.0±0.5 1.0
—
6.0
tPLH 1.8±0.15 1.0
tPHL 2.5±0.2 1.0
—
—
21.0
9.4
2.7
1.0 —
7.4
3.3±0.3 1.0
—
6.5
5.0±0.5 1.0
—
6.0
tPLH 1.8±0.15 1.0
tPHL 2.5±0.2 1.0
—
—
20.3
8.4
2.7
1.0 —
6.4
3.3±0.3 1.0
—
5.8
5.0±0.5 1.0
—
5.0
Output skew between
tOSLH
1.8±0.15 —
—
—
pins*1
tOSHL
2.5±0.2 —
—
—
2.7 — — —
3.3±0.3 — — 1.0
5.0±0.5 — — 1.0
Input capacitance
CIN 3.3
—
Note: 1. This parameter is characterized but not tested.
5.0
—
tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|
Unit
ns
ns
ns
ns
pF
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From
(Input)
A, B, C
To
(Output)
Y0 to Y7
G2A, G2B Y0 to Y7
G1 Y0 to Y7
Operating Characteristics
Item
Power dissipation capacitance
Symbol
CPD
VCC = (V)
1.8
2.5
3.3
5.0
Min
—
—
—
—
Ta = 25°C
Typ Max
25 —
26 —
27 —
30 —
Unit
pF
Test Conditions
f = 10 MHz
Rev.2.00 Jan. 14, 2005 page 5 of 7
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet RD74LVC138B.PDF ] |
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