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PDF ICS873990 Data sheet ( Hoja de datos )
| Número de pieza | ICS873990 | |
| Descripción | LOW VOLTAGE LVCMOS/ CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS873990www.DataSheet4U.com
LOW VOLTAGE, LVCMOS/
CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR
GENERAL DESCRIPTION
ICS
The ICS873990 is a low voltage, low skew, 3.3V
LVPECL/ECL Clock Generator and a member
HiPerClockS™ of the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS873990 has
two selectable clock inputs. The XTAL1 and
XTAL2 are used to interface to a crystal and the TEST_CLK
pin can accept a LVCMOS or LVTTL input. This device has a
fully integrated PLL along with frequency configurable out-
puts. An external feedback input and output regenerates
clocks with “zero delay”.
The four independent banks of outputs each have their own
output dividers, which allow the device to generate a multi-
tude of different bank frequency ratios and output-to-input
frequency ratios. The output frequency range is 25MHz to
400MHz and the input frequency range is 6.25MHz to
125MHz. The PLL_SEL input can be used to bypass the PLL
for test and system debug purposes. In bypass mode, the
input clock is routed around the PLL and into the internal out-
put dividers.
The ICS873990 also has a SYNC output which can be used
for system synchronization purposes. It monitors Bank A and
Bank C outputs for coincident rising edges and signals a pulse
per the timing diagrams in this data sheet. This feature is used
primarily in applications where Bank A and Bank C are run-
ning at different frequencies, and is particularly useful when
they are running at non-integer multiples of each other.
FEATURES
• 14 differential LVPECL outputs
• Selectable crystal oscillator interface or TEST_CLK inputs
• TEST_CLK accepts the following input levels:
LVCMOS, LVTTL
• Output frequency: 400MHz (maximum)
• Crystal input frequency range: 10MHz to 25MHz
• VCO range: 200MHz to 800MHz
• Output skew: 250ps (maximum)
• Cycle-to-cyle jitter: ±50ps (typical)
• LVPECL mode operating voltage supply range:
V = 3.135V to 3.465V, V = 0V
CC EE
• ECL mode operating voltage supply range:
V = 0V, V = -3.465V to -3.135V
CC EE
• 0°C to 70°C ambient operating temperature
• Industrial temperature available upon request
• Lead-Free package fully RoHS compliant
PIN ASSIGNMENT
Example Applications:
1. Line Card Multiplier: Multiply 19.44MHz from a back-plane
to 77.76MHz on the line card ASIC and Serdes.
2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies
from a reference clock to multiple processing units on an
embedded system.
nQB3
QB3
VCCO
nQA0
QA0
nQA1
QA1
nQA2
QA2
nQA3
QA3
SYNC_SEL
VCO_SEL
39 38 37 36 35 34 33 32 31 30 29 28 27
40 26
41 25
42 24
43 23
44 22
45 21
46 ICS873990 20
47 19
48 18
49 17
50 16
51 15
52 14
1 2 3 4 5 6 7 8 9 10 11 12 13
QC1
nQC1
QC0
nQC0
VCCO
QD1
nQD1
QD0
nQD0
VCCO
QFB
nQFB
VCCA
873990AY
52-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
www.icst.com/products/hiperclocks.html
1
REV. B JUNE 13, 2005
1 page  
Integrated
Circuit
Systems, Inc.
QA
QC
SYNC (QD)
QA
QC
SYNC (QD)
QA
QC
SYNC (QD)
QA
QC
SYNC (QD)
QA
QC
SYNC (QD)
ICS873990www.DataSheet4U.com
LOW VOLTAGE, LVCMOS/
CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:3 Mode
FIGURE 1. TIMING DIAGRAMS
873990AY
www.icst.com/products/hiperclocks.html
5
REV. B JUNE 13, 2005
5 Page 
Integrated
Circuit
Systems, Inc.
ICS873990www.DataSheet4U.com
LOW VOLTAGE, LVCMOS/
CRYSTAL-TO-LVPECL/ECL CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS873990.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS873990 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 3.3V + 5% = 3.465V, which gives worst case results.
CC
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core) = V * I = 3.465V * 165mA = 571.7mW
MAX
CC_MAX EE_MAX
• Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 14 * 30mW = 420mW
Total Power_MAX (3.465V, with all outputs switching) = 571.7mW + 420mW = 991.7mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 47.1°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.992W * 47.1°C/W = 116.7°C. This is below the limit of 125°C.
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 8. THERMAL RESISTANCE θJA FOR 52-PIN LQFP, FORCED CONVECTION
θJA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
58.0°C/W
42.3°C/W
200
47.1°C/W
36.4°C/W
500
42.0°C/W
34.0°C/W
NOTE: Most modern PCB designs use multi-layered boards.The data in the second row pertains to most designs.
873990AY
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REV. B JUNE 13, 2005
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ICS873990.PDF ] | |
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