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PDF ICS98ULPA877A Data sheet ( Hoja de datos )
| Número de pieza | ICS98ULPA877A | |
| Descripción | 1.8V Low-Power Wide-Range Frequency Clock Driver | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS98UL PA8 77A
Advance Informationwww.DataSheet4U.com
1.8V Low-Power Wide-Range Frequency Clock Driver
Recommended Application:
• DDR2 Memory Modules / Zero Delay Board Fan Out
• Provides complete DDR2 DIMM logic solution
Product Description/Features:
• Low skew, low jitter PLL clock driver
• 1 to 10 differential clock distribution (SSTL_18)
• Feedback pins for input to output synchronization
• Spread Spectrum tolerant inputs
• Auto PD when input signal is at a certain logic state
Switching Characteristics:
• Period jitter: 40ps (DDR2-400/533)
30ps (DDR2-667/800)
• Half-period jitter: 60ps (DDR2-400/533)
50ps (DDR2-667/800)
• OUTPUT - OUTPUT skew: 40ps (DDR2-400/533)
30ps (DDR2-667/800)
• CYCLE - CYCLE jitter 40ps
Block Diagram
Pin Configuration
123456
A
B
C
D
E
F
G
H
J
K
1
A CLKT1
B CLKC1
C CLKC2
D CLKT2
E CLK_INT
F CLK_INC
G AGND
H AVDD
J CLKT3
K CLKC3
2
CLKT0
GND
GND
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
CLKC4
52-Ball BGA
Top View
3
CLKC0
GND
NB
VDDQ
NB
NB
VDDQ
NB
GND
CLKT4
4
CLKC5
GND
NB
VDDQ
NB
NB
VDDQ
NB
GND
CLKT9
5
CLKT5
GND
GND
OS
VDDQ
OE
VDDQ
GND
GND
CLKC9
6
CLKT6
CLKC6
CLKC7
CLKT7
FB_INT
FB_INC
FB_OUTC
FB_OUTT
CLKT8
CLKC8
OE
OS
AVDD
(1)
LD or OE
POWER
DOWN
AND LD, OS, or OE
TEST
MODE
LOGIC
PLL BYPASS
LD
CLK_INT
CLK_INC
10KΩ - 100KΩ
FBIN_INT
FBIN_INC
PLL
NOTE:
1. The Logic Detect (LD) powers down the device
when a logic LOW is applied to both CLK_INT and
CLK_INC.
1177C—05/23/07
CLKT0
CLKC0
CLKT1
CLKC1
CLKT2
CLKC2
CLKT3
CLKC3
CLKT4
CLKC4
CLKT5
CLKC5
CLKT6
CLKC6
CLKT7
CLKC7
CLKT8
CLKC8
CLKT9
CLKC9
FBOUTT
FBOUTC
VDDQ
CLKC2
CLKT2
CLK_INT
CLK_INC
VDDQ
AGND
AVDD
VDDQ
GND
1
2
3
4
5
6
7
8
9
10
40-Pin MLF
30 CLKC7
29 CLKT7
28 VDDQ
27 FB_INT
26 FB_INC
25 FBOUTC
24 FBOUTT
23 VDDQ
22 OE
21 OS
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
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ICS98wUwwL.DPataAShe8et74U7.coAm
Advance Information
Recommended Operating Condition (see note1)
Commercial: TA = 0°C - 70°C; Industrial: TA = -40°C - +85°C;
Supply Voltage AVDDQ, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Supply Voltage
Low level input voltage
High level input voltage
DC input signal voltage
(note 2)
Differential input signal
voltage (note 3)
VDDQ, AVDD
1.7 1.8 1.9
CLK_INT, CLK_INC, FB_INC,
VIL FB_INT
0.35 x VDDQ
OE, OS
0.35 x VDDQ
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.65 x VDDQ
OE, OS
0.65 x VDDQ
VIN -0.3 VDDQ + 0.3
DC - CLK_INT, CLK_INC,
VID
FB_INC, FB_INT
AC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.3
0.6
VDDQ + 0.4
VDDQ + 0.4
V
V
V
V
V
V
V
V
Output differential cross-
voltage (note 4)
Input differential cross-
voltage (note 4)
VOX
VIX
VDDQ/2 - 0.10
VDDQ/2 + 0.10 V
VDDQ/2 - 0.15 VDD/2 VDDQ2 + 0.15 V
High level output current
Low level output current
Operating free-air
temperature
IOH
IOL
TA
-9 mA
9 mA
-40 85 °C
Notes:
1. Unused inputs must be held high or low to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VTR is the true input level and VCP is the
complementary input level.
4. Differential cross-point voltage is expected to track variations of VDDQ and is the
voltage at which the differential signal must be crossing.
1177C—05/23/07
5
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ICS98wUwwL.DPataAShe8et74U7.coAm
Advance Information
CLK#
CLK
FBIN#
FBIN
t(∅)dyn
t(∅)
SSC OFF
SSC ON
t(∅)dyn
t(∅)dyn
Figure 9: Dynamic Phase Offset
t(∅)
SSC OFF
SSC ON
t(∅)dyn
OE
Y. Y#
OE
Y
Y#
50% VDDQ
tEN
50% VDDQ
50% VDDQ
tDIS
50% VDDQ
Figure 10: Time Delay Between OE and Clock Output (Y, Y#)
Y#
Y
1177C—05/23/07
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ICS98ULPA877A.PDF ] | |
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