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PDF VND810PEP-E Data sheet ( Hoja de datos )
| Número de pieza | VND810PEP-E | |
| Descripción | DOUBLE CHANNEL HIGH SIDE DRIVER | |
| Fabricantes | STMicroelectronics | |
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VND810PEP-E
DOUBLE CHANNEL HIGH SIDE DRIVER
Table 1. General Features
TYPE
RDS(on)
VND810PEP-E 160 mΩ (*)
IOUT
3.5 A (*)
VCC
36 V
(*) Per each channel
■ CMOS COMPATIBLE INPUTS
■ OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
Figure 1. Package
TARGET SPECIFICATION
PowerSSO-12
DESCRIPTION
The VND810PEP-E is a monolithic device designed
in STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects open
load condition both in on and off state. Output
shorted to VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
Table 2. Order Codes
Package
PowerSSO-12
Note: (**) See application schematic at page 9
Tube
VND810PEP-E
Tape and Reel
VND810PEPTR-E
November 2004
Rev. 4
1/15
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1 page  
ELECTRICAL CHARACTERISTICS (continued)
VND810PEP-E
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Table 9. Logic Input
Symbol
Parameter
VIL Input Low Level
IIL Low Level Input Current
VIH Input High Level
IIH
VI(hyst)
High Level Input Current
Input Hysteresis Voltage
VICL Input Clamp Voltage
Test Conditions
VIN = 1.25V
VIN = 3.25V
IIN = 1mA
IIN = -1mA
Min.
1
3.25
0.5
6
Typ.
6.8
-0.7
Max.
1.25
10
8
Unit
V
µA
V
µA
V
V
V
Table 10. Protections (See note 1)
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
TTSD Shut-down Temperature
150 175 200 °C
TR
Thyst
Reset Temperature
Thermal Hysteresis
135
7 15
°C
°C
tSDL
Status Delay in Overload Tj>TTSD
Conditions
20 µs
Ilim Current limitation
5.5V<VCC<36V
3.5 5 7.5 A
7.5 A
Turn-off Output Clamp
Vdemag Voltage
IOUT=1A; L=6mH
VCC-41 VCC-48 VCC-55 V
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
Table 11. Openload Detection
Symbol
IOL
tDOL(on)
VOL
tDOL(off)
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection Delay
at Turn Off
VIN=5V
IOUT=0A
VIN=0V
Test Conditions
Min Typ Max Unit
20 40 80 mA
200 µs
1.5 2.5 3.5
V
1000 µs
5/15
5 Page 
PowerSSO-12 Thermal Data
Figure 10. PowerSSO-12 PC Board
VND810PEP-E
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Layout condition of Rth and Zth measurements (PCB FR4 area= 78mm x 78mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).
Figure 11. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
60
55
50
45
0 12 34 56 78 9
PCB Cu heatsink area (cm^2)
11/15
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