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PDF LC78620E Data sheet ( Hoja de datos )

Número de pieza LC78620E
Descripción Compact Disc Player DSP
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC78620E Hoja de datos, Descripción, Manual

Ordering number : EN*5130
CMOS LSI
LC78620E
Compact Disc Player DSP
Preliminary
Overview
The LC78620E is a CMOS LSI that implements the signal
processing and servo control required by compact disk
players, laser disks, CD-V, CD-I and related products. The
LC78620E provides several types of signal processing,
including demodulation of the optical pickup EFM signal,
de-interleaving, error detection and correction, and digital
filters that can help reduce the cost of CD player units. It
also processes a rich set of servo system commands sent
from the control microprocessor. It also incorporates an
EFM-PLL circuit and a one-bit D/A converter.
Functions
• Input signal processing: The LC78620E takes an HF
signal as input, digitizes (slices) that signal at a precise
level, converts that signal to an EFM signal, and
generates a PLL clock with an average frequency of
4.3218 MHz by comparing the phases of that signal and
an internal VCO.
• Precise reference clock and necessary internal timing
generation using an external 16.9344 MHz crystal
oscillator
• Disk motor speed control using a frame phase difference
signal generated from the playback clock and the
reference clock
• Frame synchronization signal detection, protection and
interpolation to assure stable data readout
• EFM signal demodulation and conversion to 8-bit
symbol data
• Subcode data separation from the EFM demodulated
signal and output of that data to an external
microprocessor
• Subcode Q signal output to a microprocessor over the
serial I/O interface after performing a CRC error check
• Demodulated EFM signal buffering in internal RAM to
handle up to ±4 frames of disk rotational jitter
• Demodulated EFM signal reordering in the prescribed
order for data unscrambling and de-interleaving
• Error detection, correction, and flag processing (error
correction scheme: dual C1 plus dual C2 correction)
• The LC78620E sets the C2 flags based on the C1 flags
and a C2 check, and then performs signal interpolation
or muting depending on the C2 flags. The interpolation
circuit uses a quadruple interpolation scheme. The
output value converges to the muting level when four or
more consecutive C2 flags occur.
• Support for command input from a control
microprocessor: commands include track jump, focus
start, disk motor start/stop, muting on/off and track
count (8 bit serial input)
• Built-in digital output circuits.
• Arbitrary track counting to support high-speed data
access
• Zero cross muting
• D/A converter outputs with data continuity improved by
8× oversampling digital filters. (These filters function as
4× oversampling filters during double-speed playback.)
• Built-in third-order ∑∆ D/A converters (PWM output)
• Built-in digital attenuator (8 bits – alpha, 239 steps)
• Built-in digital de-emphasis
• Built-in digital level and peak meter functions
• Support for bilingual applications
Features
• 80-pin QIP (miniature, reduced space package)
• Silicon gate CMOS process (for low power)
• 5 V single-voltage power supply (for use in portable
products)
Package Dimensions
unit: mm
[LC78620E]
3174-QFP80E
SANYO: QIP80E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
92895HA (OT) No. 5130-1/34

1 page




LC78620E pdf
LC78620E
Figure 2 Subcode Q Output
Figure 3 Subcode Output
No. 5130-5/34

5 Page





LC78620E arduino
LC78620E
• Command noise rejection
MSB
LSB
11101111
11101110
Command
COMMAND INPUT NOISE REDUCTION MODE
RESET NOISE EXCLUSION MODE
RES = low
q
This command reduces the noise on the CQCK clock signal. While this is effective for noise pulses shorter than
500 ns, the CQCK timings TWøL, TWøH, and tsetup (see pages 4 and 5, figures 1 and 2), must be set for at least 1 µs.
6. Focus Servo Circuit; Pin 16: FOCS, pin 17: FST, pin 18: FZD, pin 70: LASER
MSB
LSB
00001000
10100010
00001010
10001010
11111110
Command
FOCUS START #1
FOCUS START #2
LASER ON
LASER OFF
NOTHING
RES = low
q
The FOCS, FST, and FZD pins are not required when the LC78620E is used in combination with the LA9230M or
the LA9231M. FZD should be tied low when these pins are not used. The LA9230M and LA9231M focus start
command is identical to the LC78620E FOCUS START #1 command.
• NOTHING
This command can be used to initialize the LC78620E by inputting FE (hexadecimal). Note that 00 (hexadecimal)
is the reset command for the LA9230M and the LA9231M, and should be used with care since it clears the result
of the automatic adjustment process and returns these chips to their initial states.
• Laser control
The LASER pin can be use as an extended output port.
• Focus start
When the LC78620E is used in combination with the LA9230M or the LA9231M, the focus start operation is
executed completely on the servo side by commands from the control microprocessor. The following section
describes this operation when the LC78620E is used in combination with the LA9230M or the LA9231M.
When a focus start instruction (either FOCUS START #1 or FOCUS START #2) is input as a servo command,
first the charge on capacitor C1 is discharged by FST and the objective lens is lowered. Next, the capacitor is
charged by FOCS, and the lens is slowly raised. FZD falls when the lens reaches the focus point. When this signal
is received, FOCS is reset and the focus servo turns on. After sending the command, the microprocessor should
check the in-focus detection signal (the LA9210 DRF signal) to confirm focus before proceeding to the next part of
the program. If focus is not achieved by the time C1 is fully charged, the microprocessor should issue another
focus command and iterate the focus servo operation.
No. 5130-11/34

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