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PDF LC78011E Data sheet ( Hoja de datos )

Número de pieza LC78011E
Descripción Digital RGB Encoder IC for Video CD and CD-G
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC78011E Hoja de datos, Descripción, Manual

Ordering number : EN5755
CMOS IC
LC78011E
Digital RGB Encoder IC for Video CD and CD-G
Overview
The LC78011E is a CMOS IC that integrates a digital
RGB encoder and a synchronizing signal generation
circuit on a single chip. A video CD or CD-G system can
be formed using the LC78011E together with an MPEG
video decoder or a CD-G decoder, respectively.
Features
• System structure
— Each system (Video CD or CD-G system) formed
with an additional chip: MPEG decoder or CD-G
decoder chip.
• Video outputs
— 8-bit D/A converter outputs: 2 channels
— The LC78011E supports the following two video
signal output formats:
Luminance signal (Y) and chroma signal (C) outputs
Composite video signal (C • VIDEO) output (Only
one D/A converter channel operates in this mode.)
• System clock
— External 4fsc clock
NTSC mode: 14.31818 MHz
PAL mode: 17.734475 MHz
PAL-M mode: 14.30244596 MHz
• External subcarrier input
— An external fsc clock is input and used for subcarrier
synchronization timing.
• Video data input
— The LC78011E supports the following four input
formats:
R, G, and B: 8 bits each
Y, U, and V: 8 bits each
Y and UV: 8 bits each (The UV input is a
multiplexed input)
R, G, and B: 4 bits each (In CD-G input support
mode)
• OSD input support
— R, G, and B + BLK 4-bit inputs (color support)
(BLK is an OSD display switching timing signal.)
• External synchronizing signal input
— Horizontal synchronizing signal, composite
synchronizing signal, and composite blanking signal
inputs: HSYNC, CSYNC, and BLANK.
• Video signal formats
— The LC78011E supports the NTSC, PAL, and PAL-
M formats.
Package Dimensions
unit: mm
3156-QIP48E
[LC78011E]
SANYO: QIP48E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
33198RM (OT) No. 5755-1/13

1 page




LC78011E pdf
LC78011E
Continued from preceding page.
Parameter
Input amplitude
Clock duty
Reset pulse width
Symbol
Conditions
VIN1
VIN2
Fduty1
twrst
CLKI (capacitor coupled)
FSCIN (capacitor coupled)
CLKI, FSCIN
RESET
min
2.0
2.0
40
400
Ratings
typ
50
max
VDD1
VDD1
60
Unit
Vp-p
Vp-p
%
ns
Electrical Characteristics at Ta = –20 to 75°C, DVDD = 5.0 V, AVDD = 5.0 V unless otherwise specified
Parameter
Input high-level current
Input low-level current
Internal feedback resistance
D/A converter resolution
D/A converter output resistance
D/A converter reference voltage
Operating current drain
Symbol
Conditions
IIH1
IIH2
IIL1
IIL2
RBIAS
RDAC
VREF
IDD1
IDD2
OSRIN, OSGIN, OSBIN, OSBLK,
BLANK, CSYNC, HSYNC, RESET,
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, TEST: VIN = DVDD
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7 (Pull-down resistors
are built in): VIN = DVDD
OSRIN, OSGIN, OSBIN, OSBLK,
BLANK, CSYNC, HSYNC, RESET,
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, TEST: VIN = DVSS
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7 (Pull-down resistors
are built in): VIN = DVSS
CLKI, FSCIN
YOUT, CROUT
YOUT, CROUT
YOUT, CROUT
(The output voltage when each bit of the 8-bit
data is zero)
DVDD
(AVDD = 5.0 V)
(DVDD = 5.0 V : NTSC)
(DVDD = 5.0 V : PAL)
(DVDD = 3.3 V : NTSC)
(DVDD = 3.3 V : PAL)
(DVDD = 5.0 V : When 2
channels are used)
AVDD
(AVDD = 5.0 V)
(DVDD = 5.0 V : When 1
channel is used)
(DVDD = 3.3 V :When 2
channels are used)
(DVDD = 3.3 V : When 1
channel is used)
Ratings
min typ
25 50
–5
–5
150
2.40
1
8 bits
300
2.45
37
45
15
18
21
12
22
13
max
5
75
500
2.50
56
68
23
27
37
21
39
23
Unit
µA
µA
µA
µA
M
V
mA
mA
mA
mA
mA
mA
mA
mA
Timing Characteristics at Ta = 25°C, DVDD = 5.0 V, AVDD = 5.0 V, tr = tf = 3 ns unless otherwise specified
Parameter
Data setup time
Data hold time
Minimum clock pulse width
Input clock duty
Symbol
Conditions
tDS
tDH
tWL
tWH
tduty
RYIN0 to 7, GUIN0 to 7, BVIN0 to 7 CLKI
BLANK, CSYNC, HSYNC CLKI
OSRIN, OSGIN, OSBIN, OSBLK CLKI
FSCIN CLKI
: DVDD = 5.0 V
: DVDD = 3.3 V
CLKI RYIN0 to 7, GUIN0 to 7, BVIN0 to 7
CLKI BLANK, CSYNC, HSYNC
CLK OSRIN, OSGIN, OSBIN, OSBLK
CLKI FSCIN
: DVDD = 5.0 V
: DVDD = 3.3 V
CLKI (For a square wave input)
CLKI (For a square wave input)
CLKI, FSCIN (For a sine wave input)
Ratings
min typ
0
0
10
12
18
18
40
Unit
max
ns
ns
ns
ns
ns
ns
60 %
No. 5755-5/13

5 Page





LC78011E arduino
LC78011E
Functional Description
1. Clocks
The system clock operates at 4fsc and is input to the CLKI pin (pin 6). A feedback (bias) resistor is built in.
Input clock frequencies:
NTSC mode: 14.31818 MHz
PAL mode: 17.734475 MHz
PAL-M mode: 14.30244596 MHz
2. Video signal output formats
The LC78011E can provide either a Y/C (luminance signal/chrominance signal) separated signal output or a
composite video signal output.
The CCSEL pin (pin 30) selects the output format.
CCSEL (pin 30) setting
CROUT (pin 26) output
YOUT (pin 28) output
High = 1
Composite video signal
Fixed low-level output
(The D/A converter is stopped.)
Low = 0
Chroma signal (C)
Luminance signal (Y)
3. Digital video input switching
The LC78011E supports both input from an MPEG decoder (24 bits, 8 bits each of R, G, and B data) and a 12-bit
CD-G input (4 bits each of R, G, and B data). The CDGSEL pin (pin 33) switches the input.
CDGSEL (pin 33)
Digital input selection
Low = 0
12-bit input (CD-G)
High = 1
24-bit input (Video CD)
• Sample CD-G (LC7874E) connection
LC78011E
LC7874E
RYIN7 (pin 45) ROUT3 (pin 36)
RYIN6 (pin 46) ROUT2 (pin 37)
R RYIN5 (pin 47) ROUT1 (pin 38)
RYIN4 (pin 48) ROUT0 (pin 39)
GUIN7 (pin 9) GOUT3 (pin 42)
GUIN6 (pin 10) GOUT2 (pin 43)
G GUIN5 (pin 11) GOUT1 (pin 44)
GUIN4 (pin 12) GOUT0 (pin 45)
BVIN7 (pin 17) BOUT3 (pin 46)
BVIN6 (pin 18) BOUT2 (pin 47)
B BVIN5 (pin 19) BOUT1 (pin 48)
BVIN4 (pin 20) BOUT0 (pin 49)
4. Digital video input format selection
The LC78011E supports both RGB and YUV formats. The YUVSEL1 and YUVSEL2 pins (pins 43 and 44) are
used to select the input video format.
YUVSEL2 (pin 44)
Low = 0
Low = 0
YUVSEL1 (pin 43)
Low = 0
High = 1
Input format
RGB input
YUV input
High = 1
High = 1
Low = 0
High = 1
Y/UV input*
Illegal value
Note :* GUIN0 to GUIN7 are not used in the Y/UV input mode.
The U/V discrimination for the UV input is performed by starting acquisition of the U input data with a timing referenced to the falling edge of
the BLANK pin (pin 40) input signal. In this mode, the input pins GUIN0 to GUIN7 must be left open or tied to DVSS. (These inputs include
built-in pull-down resistors.)
No. 5755-11/13

11 Page







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