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PDF AD7798 Data sheet ( Hoja de datos )

Número de pieza AD7798
Descripción 3-Channel Low Noise Low Power ADC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
3-Channel, Low Noise, Low Power,
16-/24-Bit, Σ-Δ ADC with On-Chip In-Amp
AD7798/AD7799
FEATURES
RMS noise:
27 nV at 4.17 Hz (AD7799)
65 nV at 16.7 Hz (AD7799)
40 nV at 4.17 Hz (AD7798)
85 nV at 16.7 Hz (AD7798)
Current: 380 µA typical
Power-down: 1 µA maximum
Low noise, programmable gain, instrumentation amp
Update rate: 4.17 Hz to 470 Hz
3 differential inputs
Internal clock oscillator
Simultaneous 50 Hz/60 Hz rejection
Reference detect
Low-side power switch
Programmable digital outputs
Burnout currents
Power supply: 2.7 V to 5.25 V
–40°C to +105°C temperature range
Independent interface power supply
16-lead TSSOP package
INTERFACE
3-wire serial
SPI®, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
Weigh scales
Pressure measurement
Strain gauge transducers
Gas analysis
Industrial process control
Instrumentation
Portable instrumentation
Blood analysis
Smart transmitters
Liquid/gas chromotography
6-digit DVM
FUNCTIONAL BLOCK DIAGRAM
GND AVDD
REFIN(+) REFIN(–)
AD7798/AD7799
REFERENCE
DETECT
AIN1(+)
AIN1(–)
AIN2(+)
AIN2(–)
AIN3(+)/P1
AIN3(–)/P2
PSW
AVDD
MUX
IN-AMP
Σ-Δ
ADC
GND
GND
INTERNAL
CLOCK
Figure 1.
SERIAL
INTERFACE
AND
CONTROL
LOGIC
AD7798: 16-BIT
AD7799: 24-BIT
DOUT/RDY
DIN
SCLK
CS
DVDD
GENERAL DESCRIPTION
The AD7798/AD7799 are low power, low noise, complete
analog front ends for high precision measurement applications.
The AD7798/AD7799 contains a low noise, 16-/24-bit ∑-∆
ADC with three differential analog inputs. The on-chip, low
noise instrumentation amplifier means that signals of small
amplitude can be interfaced directly to the ADC. With a gain
setting of 64, the rms noise is 27 nV for the AD7799 and 40 nV
for the AD7798 when the update rate equals 4.17 Hz.
On-chip features include a low-side power switch, reference
detect, programmable digital output pins, burnout currents,
and an internal clock oscillator. The output data rate from the
part is software-programmable and can be varied from 4.17 Hz
to 470 Hz.
The part operates with a power supply from 2.7 V to 5.25 V.
The AD7798 consumes a current of 300 µA typical, whereas the
AD7799 consumes 380 µA typical. Both devices are housed in a
16-lead TSSOP package.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD7798 pdf
Data Sheet
AD7798/AD7799
Parameter
SYSTEM CALIBRATION2
Full-Scale Calibration Limit
Zero-Scale Calibration Limit
Input Span
POWER REQUIREMENTS7
Power Supply Voltage
AVDD – GND
DVDD – GND
Power Supply Currents
IDD Current
IDD (Power-Down Mode)
AD7798B/AD7799B1 Unit
1.05 × FS
V max
−1.05 × FS
0.8 × FS
2.1 × FS
V min
V min
V max
2.7/5.25
2.7/5.25
140
180
400
500
1
V min/max
V min/max
µA max
µA max
µA max
µA max
µA max
Test Conditions/Comments
FS = Full-scale analog input. When VREF = AVDD, the
differential input must be limited to (0.9 × VREF/gain)
if the in-amp is active.
Unbuffered mode, 110 µA typ @ AVDD = 3 V,
125 µA typ @ AVDD = 5 V
Buffered mode, gain = 1 or 2, 130 µA typ @ AVDD = 3 V,
165 µA typ @ AVDD = 5 V
AD7798: gain = 4 to 128, 300 µA typ @ AVDD = 3 V,
350 µA typ @ AVDD = 5 V
AD7799: gain = 4 to 128, 380 µA typ @ AVDD = 3 V,
440 µA typ @ AVDD = 5 V
1 Temperature range is –40°C to +105°C. At the 19.6 Hz and 39.2 Hz update rates, the INL, power supply rejection (PSR), common-mode rejection (CMR), and normal
mode rejection (NMR) do not meet the data sheet specification if the voltage on the AIN(+) or AIN(−) pins exceeds AVDD − 1.6 V typically. When this voltage is
exceeded, the INL, for example, is reduced to 18 ppm of FS typically and the PSR is reduced to 69 dB typically. Therefore, for guaranteed performance at these update
rates, the absolute voltage on the analog input pins needs to be below AVDD − 1.6 V.
2 Specification is not production tested, but is supported by characterization data at initial product release.
3 Following a calibration, this error is in the order of the noise for the programmed gain and update rate selected.
4 Recalibration at any temperature removes these errors.
5 Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AVDD = 4 V, gain = 1, TA = 25°C).
6 FS[3:0] are the four bits used in the mode register to select the output word rate.
7 Digital inputs equal to DVDD or GND.
Rev. B | Page 5 of 28

5 Page





AD7798 arduino
Data Sheet
AD7798/AD7799
AD7799
Table 7 shows the AD7799 output rms noise for some update
rates and gain settings. The numbers given are for the bipolar
input range with a 2.5 V reference. These numbers are typical
and are generated with a differential input voltage of 0 V. Table 8
shows the effective resolution, and the output peak-to-peak
resolution is given in parentheses. Note that the effective
resolution is calculated using the rms noise, whereas the
peak-to-peak resolution is based on peak-to-peak noise. The
peak-to-peak resolution represents the resolution for which
there is no code flicker. These numbers are typical and are
rounded to the nearest LSB.
Table 7. Output RMS Noise (µV) vs. Gain and Output Update Rate for the AD7799 Using a 2.5 V Reference
Update Rate Gain of 1 Gain of 2
Gain of 4
Gain of 8
Gain of 16 Gain of 32 Gain of 64
4.17 Hz
0.64 0.6
0.185
0.097
0.075
0.035
0.027
8.33 Hz
1.04 0.96
0.269
0.165
0.108
0.048
0.037
16.7 Hz
1.55 1.45
0.433
0.258
0.176
0.085
0.065
33.2 Hz
2.3 2.13
0.647
0.364
0.24
0.118
0.097
62 Hz
2.95 2.85
0.952
0.586
0.361
0.178
0.133
123 Hz
4.89 4.74
1.356
0.785
0.521
0.265
0.192
242 Hz
11.76
9.5
3.797
2.054
1.027
0.476
0.326
470 Hz
11.33
9.44
3.132
1.773
1.107
0.5
0.413
Table 8. Typical Resolution (Bits) vs. Gain and Output Update Rate for the AD7799 Using a 2.5 V Reference
Update Rate Gain of 1 Gain of 2
Gain of 4
Gain of 8
Gain of 16 Gain of 32 Gain of 64
4.17 Hz
23 (20.5) 22 (19.5)
22.5 (20)
22.5 (20)
22 (19.5)
22 (19.5)
21.5 (19)
8.33 Hz
22 (19.5) 21.5 (19)
22 (19.5)
22 (19.5)
21.5 (19)
21.5 (19)
21 (18.5)
16.7 Hz
21.5 (19) 20.5 (18)
21.5 (19)
21 (18.5)
21 (18.5)
21 (18.5)
20 (17.5)
33.3 Hz
21 (18.5) 20 (17.5)
21 (18.5)
20.5 (18)
20.5 (18)
20.5 (18)
19.5 (17)
62 Hz
20.5 (18) 19.5 (17)
20.5 (18)
20 (17.5)
19.5 (17)
19.5 (17)
19 (16.5)
123 Hz
20 (17.5) 19 (16.5)
20 (17.5)
19.5 (17)
19 (16.5)
19 (16.5)
18.5 (16)
242 Hz
18.5 (16) 18 (15.5)
18.5 (16)
18 (15.5)
18 (15.5)
18.5 (16)
18 (15.5)
470 Hz
18.5 (16) 18 (15.5)
18.5 (16)
18.5 (16)
18 (15.5)
18.5 (16)
17.5 (15)
Gain of 128
0.027
0.040
0.065
0.094
0.134
0.192
0.308
0.374
Gain of 128
20.5 (18)
20 (17.5)
19 (16.5)
18.5 (16)
18 (15.5)
17.5 (15)
17 (14.5)
16.5 (14)
Rev. B | Page 11 of 28

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