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PDF ICS843020-01 Data sheet ( Hoja de datos )

Número de pieza ICS843020-01
Descripción FEMTOCLOCKS 680MHZ CRYSTAL-TO- 3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
Fabricantes Integrated Circuit Systems 
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Integrated
Circuit
Systems, Inc.
ICS843020-01www.DataSheet4U.com
FEMTOCLOCKS™ 680MHZ, CRYSTAL-TO-
3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
ICS
The ICS843020-01 is a general purpose, dual out-
put Crystal-to-3.3V Differential LVPECL High Fre-
HiPerClockS™ quency Synthesizer and a member of the
FemtoClocks™ family of High Performance Clock
Solutions from ICS. The ICS843020-01 is based
on ICS’ 3rd generation VCO technology and is capable of sub-
1ps RMS Phase Jitter performance, making it ideal for use in
10 Gigabit Ethernet, 10 Gigabit Fibre Channel, SONET and
Serial ATA applications.
The ICS843020-01 is a highly flexible programmable synthe-
sizer capable of generating output frequencies over a range of
70MHz to 680MHz. The output frequency can be programmed
in small step sizes as low as 250kHz when using a 16MHz
crystal, ÷8 input divider, and output divider = ÷8.
FEATURES
Dual differential 3.3V LVPECL outputs
Selectable crystal oscillator interface
or LVCMOS/LVTTL TEST_CLK
Output frequency range: 70MHz to 680MHz
Crystal input frequency range: 12MHz to 32MHz
VCO range: 560MHz to 680MHz
Parallel or serial interface for programming feedback
and output dividers
Input P_DIV under parallel load control
RMS phase jitter at 156.25MHz (1.875MHz to 20MHz):
0.49ps (typical), P_DIV = ÷1
3.3V supply voltage
0°C to 70°C ambient operating temperature
Lead-Free package fully RoHS compliant
BLOCK DIAGRAM
VCO_SEL
XTAL_SEL
TEST_CLK
XTAL_IN
XTAL_OUT
P_DIV
OSC
0
1
÷P
0 ÷8
Float ÷1 (default)
1 ÷4
MR
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
PLL
PHASE DETECTOR
÷N
÷1
VCO
0 ÷2
÷4
÷M 1 ÷8
CONFIGURATION
INTERFACE
LOGIC
PIN ASSIGNMENT
FOUT0
nFOUT0
FOUT1
nFOUT1
M5
M6
M7
M8
N0
N1
P_DIV
VEE
32 31 30 29 28 27 26 25
1 24
2 23
3 22
4 ICS843020-01 21
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
XTAL_OUT
TEST_CLK
XTAL_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
TEST
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
843020AY-01
www.icst.com/products/hiperclocks.html
1
REV. B APRIL 14, 2005

1 page




ICS843020-01 pdf
Integrated
Circuit
Systems, Inc.
ICS843020-01www.DataSheet4U.com
FEMTOCLOCKS™ 680MHZ, CRYSTAL-TO-
3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
TABLE 3D. PROGRAMMABLE VCO FREQUENCY FUNCTION TABLE WITH P = ÷8 (P_DIV = 0)
VCO Frequency
(MHz)
M Divide
256
M8
128
M7
64
M6
32
M5
16
M4
8
M3
4
M2
2
M1
575 184 0 1 0 1 1 1 0 0
• • ••••••••
600 192 0 1 1 0 0 0 0 0
• • ••••••••
675 216 0 1 1 0 0 1 1 1
NOTE 1: These M divide values and the resulting frequencies correspond to crystal or TEST_CLK input frequency
of 25MHz.
1
M0
0
0
0
TABLE 3E. PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE
Inputs
N1 N0
00
01
10
11
N Divider Value
1
2
4
8
Output Frequency (MHz)
Minimum Maximum
560 680
280 340
140 170
70 85
843020AY-01
www.icst.com/products/hiperclocks.html
5
REV. B APRIL 14, 2005

5 Page





ICS843020-01 arduino
Integrated
Circuit
Systems, Inc.
ICS843020-01www.DataSheet4U.com
FEMTOCLOCKS™ 680MHZ, CRYSTAL-TO-
3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843020-01 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC, VCCA, and VCCO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 2 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin.
VCC
VCCA
3.3V
.01μF 10Ω
.01μF
10μF
FIGURE 2. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
A crystal can be characterized for either series or parallel mode
operation.The ICS843020-01 has a built-in crystal oscillator circuit.
This interface can accept either a series or parallel crystal without
additional components and generate frequencies with accuracy
suitable for most applications. Additional accuracy can be
achieved by adding two small capacitors C1 and C2 as shown in
Figure 3.
X1
18pF Parallel Crystal
XTAL_OUT
C1
18p
XTAL_IN
C2
22p
Figure 3. CRYSTAL INPUt INTERFACE
843020AY-01
www.icst.com/products/hiperclocks.html
11
REV. B APRIL 14, 2005

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