PDF P89LPC904 Data sheet ( Hoja de datos )

Número de pieza	P89LPC904
Descripción	8-bit microcontrollers
Fabricantes	NXP Semiconductors
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No Preview Available ! www.DataSheet4U.com P89LPC904 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter Rev. 02 — 25 June 2004 Preliminary data 1. General description The P89LPC904 is a single-chip microcontroller in a low-cost 8-pin package based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC904 in order to reduce component count, board space, and system cost. 2. Features 2.1 Principal features s 1 kB byte-erasable Flash code memory organized into 256-byte sectors and 16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. s 128-byte RAM data memory. s Two 16-bit counter/timers. s 23-bit system timer that can also be used as a Real-Time clock. s 2 -input multiplexed A/D converter/single DAC output. Two analog comparators with selectable reference. s Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities. s High-accuracy internal RC oscillator option allows operation without external oscillator components. The RC oscillator option is selectable and ﬁne tunable. s 2.4 V to 3.6 V VDD operating range with 5 V tolerant I/O pins (may be pulled up or driven to 5.5 V). Industry-standard pinout with VDD, VSS, and reset at locations 1, 8, and 4. s Up to six I/O pins when using internal oscillator and reset options. s 8-pin SO-8 package. 2.2 Additional features s A high performance 80C51 CPU provides instruction cycle times of 167 ns to 333 ns for all instructions except multiply and divide when executing at 12 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI. s In-Application Programming (IAP-Lite) and byte erase allows code memory to be used for non-volatile data storage. 1 page Philips Semiconductors 5. Pinning information 5.1 Pinning P89LPC904www.DataSheet4U.com 8-bit microcontrollers with two-clock accelerated 80C51 core VDD 1 AD11/P0.2/CIN2A/KBI2 2 P1.1/RxD 3 RST/P1.5 4 Fig 2. P89LPC904 pinning (SO8). 8 VSS 7 P0.4/CIN1A/AD13/DAC1 6 P0.5/CMPREF/CLKIN 5 P1.0/TxD 002aaa780 5.2 Pin description Table 3: P89LPC904 pin description Symbol Pin Type Description P0.0 to P0.6 2, 6, 7 I/O Port 0: Port 0 is an I/O port with a user-conﬁgurable output type. During reset Port 0 latches are conﬁgured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port conﬁguration selected. Each port pin is conﬁgured independently. Refer to Section 8.13.1 “Port conﬁgurations” and Table 8 “DC electrical characteristics” for details. The Keypad Interrupt feature operates with Port 0 pins. All pins have Schmitt triggered inputs. Port 0 also provides various special functions as described below: 2 I/O P0.2 — Port 0 bit 2. I CIN2A — Comparator 2 positive input. I KBI2 — Keyboard input 2. I AD11 — ADC1 channel 1 analog input. 7 I/O P0.4 — Port 0 bit 4. I CIN1A — Comparator 1 positive input. I AD13 — ADC1 channel 3 analog input. O DAC1 — Digital to analog converter output. 6 I/O P0.5 — Port 0 bit 5. I CMPREF — Comparator reference (negative) input. I CLKIN — External clock input. 9397 750 13521 Preliminary data Rev. 02 — 25 June 2004 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 5 of 41 5 Page xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Table 4: P89LPC904 Special function registers…continued * indicates SFRs that are bit addressable. Name PCONB Description reserved for Power Control Register B SFR addr. B6H MSB - - Bit functions and addresses ---- Reset value LSB Hex Binary - - 00[1] xxxxxxxx Bit address D7 D6 D5 D4 D3 D2 D1 D0 PSW* Program status word D0H CY AC F0 RS1 RS0 OV F1 P 00 00000000 PT0AD RSTSRC RTCCON Port 0 digital input disable Reset source register Real-time clock control F6H DFH D1H - - RTCF - - RTCS1 PT0AD.5 PT0AD.4 BOF POF RTCS0 - - R_BK - PT0AD.2 R_WD - - R_SF ERTC - R_EX RTCEN 00 [3] 60[1] [7] xx00000x 011xxx00 RTCH RTCL Real-time clock register HIGH D2H Real-time clock register LOW D3H 00[7] 00000000 00[7] 00000000 SADDR Serial port address register A9H 00 00000000 SADEN Serial port address enable B9H 00 00000000 SBUF Serial port data buffer register 99H xx xxxxxxxx Bit address 9F 9E 9D 9C 9B 9A 99 98 SCON* Serial port control 98H SM0/FE SM1 SM2 REN TB8 RB8 TI RI 00 00000000 SSTAT Serial port extended status BAH DBMOD INTLO CIDIS DBISEL FE BR OE STINT 00 00000000 register SP Stack pointer 81H 07 00000111 Bit address 8F 8E 8D 8C 8B 8A 89 88 TCON* Timer 0 and 1 control 88H TF1 TR1 TF0 TR0 - - - - 00 00000000 TH0 Timer 0 HIGH 8CH 00 00000000 TH1 Timer 1 HIGH 8DH 00 00000000 TL0 Timer 0 LOW 8AH 00 00000000 TL1 Timer 1 LOW 8BH 00 00000000 TMOD TRIM WDCON Timer 0 and 1 mode 89H Internal oscillator trim register 96H Watchdog control register A7H - RCCLK PRE2 - - PRE1 T1M1 TRIM.5 PRE0 T1M0 TRIM.4 - - TRIM.3 - - TRIM.2 WDRUN T0M1 TRIM.1 WDTOF T0M0 TRIM.0 WDCLK 00 [5] [6] [4] [6] 00000000 WDL Watchdog load C1H FF 11111111 WFEED1 Watchdog feed 1 C2H WFEED2 Watchdog feed 2 C3H 11 Page

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