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PDF TC530 Data sheet ( Hoja de datos )
| Número de pieza | TC530 | |
| Descripción | (TC530 / TC534) 5V PRECISION DATA ACQUISITION SUBSYSTEMS | |
| Fabricantes | TelCom Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC530 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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www.DataSheet4U.com
EVALUATION
KIT
AVAILABLE
TC530
TC534
1
5V PRECISION DATA ACQUISITION SUBSYSTEMS
FEATURES
s Precision (up to 17 Bits) A/D Converter
s 3 Wire Serial Port
s Flexible: User Can Trade-Off Conversion Speed
Against Resolution
s Single Supply Operation
s –5V Output Pin
s 4 Input, Differential Analog MUX (TC534)
s Automatic Input Polarity and Overrange Detection
s Low Operating Current ............................ 5mA Max
s Wide Analog Input Range ...................... ±4.2V Max
s Cost Effective
ORDERING INFORMATION
Part No.
TC530COI
TC530CPJ
TC534CKW
TC534CPL
TC530EV
Package
Temp. Range
28-Pin SOIC
0°C to +70°C
28-Pin Plastic DIP (300 Mil.) 0°C to +70°C
44-Pin PQFP
0°C to +70°C
40-Pin Plastic DIP
0°C to +70°C
Evaluation Kit for TC530/534
GENERAL DESCRIPTION
The TC530/534 are serial analog data acquisition sub-
systems ideal for high precision measurements (up to 17 bits
plus sign). The TC530 consists of a dual slope integrating
A/D converter, negative power supply generator and 3 wire
serial interface port. The TC534 is identical to the TC530, but
adds a four channel differential input multiplexer. Key A/D
converter operating parameters (Auto Zero and Integration
time) are programmable, allowing the user to trade-off
conversion time for resolution.
Data conversion is initiated when the RESET input is
brought low. After conversion, data is loaded into the output
shift register and EOC is asserted indicating new data is
available. The converted data (plus Overrange and polarity
bits) is held in the output shift register until read by the
processor, or until the next conversion is completed allowing
the user to access data at any time.
The TC530/534 timebase can be derived from an exter-
nal crystal of 2MHz (max), or from an external frequency
source. The TC530/534 requires a single 5V power supply
and features a – 5V, 10mA output which can be used to
supply negative bias to other components in the system.
2
3
4
5
FUNCTIONAL BLOCK DIAGRAM
(TC530 Only) VVII+NN–
CH1 +
CH1 –
TC534
(Only)
CH2 +
CH2 –
CH3 +
CH3 –
CH4 +
CH4 –
+5V
VDD
RINT
CINT
CAZ
CREF
VDD 10k 100k TC05
.01µF
DIF.
MUX
(TC534
Only)
TC530
TC534
BUF CAZ
IN +
IN –
INT CR+EF CR–EF
VR+EF
Dual Slope A/D Converter
CMPTR A B
VR–EF
ACOM
VDD
DC-TO-DC
CONVERTER
State
Machine
Oscillator
(÷ 4)
Serial Port
A0 A1
OSC
CAP+ CAP –
VSS
OSCIN
OSCOUT
Negative
Supply Output
TELCOM SEMICONDUCTOR, INC.
VDD
0.01µF
RESET
EOC
R/W
DIN
DOUT
DCLK
6
Optional
Power-On
Reset Cap
7
8
TC530/534-3 11/14/96
3-47
1 page  
5V PRECISION DATA ACQUISITION
SUBSYSTEMS
www.DataSheet4U.com
1
TC530
TC534
PIN DESCRIPTION
Pin No.
Pin No.
(TC530
(TC530
28-Pin
28-Pin
PDIP, 300 Mil.) SOIC)
11
Pin No
(TC534
40-Pin
PDIP)
1
2 22
3 33
4 44
5 55
6
7
8
9
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
10
11
12
Not Used
Not Used
14
6
7
8
9
Not Used
6
7
8
9
10
Not Used
11
Not Used
12
Not Used
13
Not Used
14
Not Used
15
Not Used
16
Not Used
17
10
11
12
Not Used
Not Used
14
Not Used
Not Used
18
19
20
21
Pin No.
(TC534
44-Pin
PQFP)
40
41
42
43
2
3
4
5
6
7
8
9
10
11
12
13
14
Not Used
Not Used
15
16
17
18
Symbol
VSS
CINT
CAZ
BUF
ACOM
CR– EF
CR+ EF
VR– EF
VR+ EF
CH4–
CH3–
CH2–
CH1–
CH4+
CH3+
CH2+
CH1+
VI–N
VI+N
DGND
A1
A0
OSCOUT
Description
Analog Output. Negative power supply converter output
and reservoir capacitor connection. This output can be
used to provide negative bias to other devices in the system.
Analog Output. Integrator capacitor connection and integrator
output.
Analog Input. Auto Zero capacitor connection.
Analog Output. Integrator capacitor connection and voltage
buffer output.
Analog Input. This pin is ground for all of the analog switches
in the A/D converter. It is grounded for most applications.
ACOM and the input common pin (VI–N or Chx–) should be
within the common mode range, CMR.
Analog Input. Reference cap negative connection.
Analog Input. Reference cap positive connection.
Analog Input. External voltage reference negative connection.
Analog Input. External voltage reference positive connection.
Analog Input. Multiplexer channel 4 negative differential
analog input.
Analog Input. Multiplexer channel 3 negative differential
analog input.
Analog Input. Multiplexer channel 2 negative differential
analog input.
Analog Input. Multiplexer channel 1 negative differential
analog input.
Analog Input. Multiplexer channel 4 positive differential
analog input.
Analog Input. Multiplexer channel 3 positive differential
analog input.
Analog Input. Multiplexer channel 2 positive differential
analog input.
Analog Input. Multiplexer channel 1 positive differential
analog input.
Analog Input. Negative differential analog voltage input.
Analog Input. Positive differential analog voltage input.
Analog Input. Ground connection for serial port circuit.
Logic Level Input. Multiplexer address MSB.
Logic Level Input. Multiplexer address LSB.
Analog Input. Timebase for state machine. This pin connects
to one side of an AT-cut crystal having an effective series
resistance of 100Ω (typ) and a parallel capacitance of 20pF
If an external frequency source is used to clock the TC530/534,
this pin must be left floating.
2
3
4
5
6
7
8
TELCOM SEMICONDUCTOR, INC.
3-51
5 Page 
5V PRECISION DATA ACQUISITION
SUBSYSTEMS
www.DataSheet4U.com
1
TC530
TC534
Timing
Status
Conversion
Phase
Power-up RESET
AZ
R/W Converter held in AZ
state due to RESET = 1
RESET
DCLK
Undefined
Write LOAD VALUE to Serial Port
Converter in Normal Service
AZ
R/W brought LOW during AZ
for serial port write cycle
INT DINT IZ AZ…
Continuous Conversions
R/W = HIGH strobes
LOAD VALUE into
timebase and starts
conversion
2
3
DIN
EOC
1 1001111
MSB
LOAD VALUE
LSB
4
Figure 4. TC530/534 Initialization and Load Value Write Cycle
verter input. A0 is the least significant address bit (i.e.,
channel 1 is selected when A0 = 1 and A1 = 0). The
multiplexer is designed to be operated in a differential mode.
For single-ended inputs, the CHx– input for the channel
under selection must be connected to the ground reference
associated with the input signal.
R/W
DCLK
DOUT
EOC OVR POL MSB
LSB
Figure 5. Serial Port Data Read Cycle
DC/DC Converter
An on-board, TC7660H-type charge pump supplies
negative bias to the converter circuitry, as well as to external
devices. The charge pump develops a negative output
voltage by moving charge from the power supply to the
reservoir capacitor at VSS by way of the commutating
capacitor connected to the CAP+ and CAP– inputs.
The charge pump clock operates at a typical frequency
of 100kHz. If lower quiescent current is desired, the charge
pump clock can be slowed by connecting an external ca-
pacitor from the OSC pin to VDD. Reference typical charac-
teristics curves.
5
APPLICATIONS
Design Example
Figure 6 shows a typical TC534 interrupt-driven applica-
tion. Timing and component values are calculated from
equations and recommendations made in the Dual Slope
Integrating Converter and Programming the TC530/534
sections of this document. The EOC connection to the
processor INT input is for interrupt-driven applications only.
(In polled systems, the EOC output is available on DOUT).
6
GIVEN
REQUIRED RESOLUTION: 16 Bits (65,536 counts.)
MAXIMUM VIN:
±2V
POWER SUPPLY VOLTAGE: +5V
60Hz SYSTEM
1. Pick Integration time (tINT)
66msec
7
2. Estimate crystal frequency
FIN = 2R/tINT = 2 x 65536/66 x 10 –3 = 1.98MHz
(use 2MHz)
8
TELCOM SEMICONDUCTOR, INC.
3-57
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet TC530.PDF ] | |
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