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PDF UPD70F3204Y Data sheet ( Hoja de datos )

Número de pieza UPD70F3204Y
Descripción 32-BIT SINGLE-CHIP MICROCONTROLLERS
Fabricantes NEC 
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PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µPD703201,
703201Y,
www.DataSheet4U.com
703204, 703204Y,
70F3201, 70F3201Y, 70F3204, 70F3204Y
V850ES/SA2TM, V850ES/SA3TM
32-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD703201, 703201Y, 70F3201, and 70F3201Y (V850ES/SA2), µPD703204, 703204Y, 70F3204, and
70F3204Y (V850ES/SA3) are products in the V850 FamilyTM of 32-bit single-chip microcontrollers, and include
peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an A/D converter, a D/A converter, and a
DMA controller.
In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/SA2
and V850ES/SA3 include instructions suited to digital servo control applications such as multiplication instructions
executed via a hardware multiplier, saturation instructions, and bit manipulation instructions. As a real-time control
system, this device provides a high-level cost performance ideal for ultra-low-power DVC and portable audio
applications.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850ES/SA2, V850ES/SA3 User’s Manual Hardware:
To be prepared
V850ES User’s Manual Architecture:
To be prepared
FEATURES
{ Number of instructions: 83
{ Interrupts and exceptions
{ Minimum instruction execution time:
Non-maskable interrupts: 2 sources
59 ns (@ 17 MHz operation with main system clock (fXX))
Maskable interrupts:
74 ns (@ 13.5 MHz operation with main system clock (fXX))
{ General-purpose registers: 32 bits × 32 registers
{ Instruction set:
38 sources (µPD703201, 70F3201)
39 sources (µPD703201Y, 70F3201Y)
39 sources (µPD703204, 70F3204)
Signed multiplication, saturation operations, 32-bit
40 sources (µPD703204Y, 70F3204Y)
shift instructions, bit manipulation instructions,
Software exceptions: 32 sources
load/store instructions
Exception trap: 1 source
{ Memory space:
{ I/O lines Total: 82 (V850ES/SA2)
64 MB linear address space
102 (V850ES/SA3)
Memory block division function:
{ Timer/counters
2 MB, 2 MB, 4 MB, 8 MB = Total four blocks
16-bit timer: 2 channels
{ External bus interface: 16-bit data bus
8-bit timer: 4 channels
Address bus: Separate output enabled
{ Internal memory
{ Real-time counter (for watch): 1 channel
{ Watchdog timer: 1 channel
Mask ROM: 256 KB (µPD703201, 703201Y,
703204, 703204Y)
Flash memory: 256 KB (µPD70F3201, 70F3201Y,
70F3204, 70F3204Y)
RAM: 16 KB
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U15436EJ1V0PM00 (1st edition)
Date Published June 2001 N CP(K)
Printed in Japan
©
2001

1 page




UPD70F3204Y pdf
µPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y
www.DataSheet4U.(c2o/2m)
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
G11 EVSS
K13 PDL3/AD3
M7 PCS4
G12 PDL10/AD10
L1 P93/A3/INTP6
M8 PCM0/WAIT
G13 EVDD
L2 P94/A4/TO2
M9 PCM2/HLDAK
H1 VSSBU
L3 P911/A11/SO2
M10 PCT3
H2 VDDBU
L4 P914/A14/SO3
M11 PCT4/RD
H3 XT2
L5 P915/A15/SCK3
M12 PCT7
H11
H12
PDL8/AD8
IC/FLMD0Notes 1, 2
L6 EVDD
L7 PCS0/CS0
M13
N1
PDL0/AD0
P96/A6/TO4
H13 PDL9/AD9
L8 PCS2/CS2
N2 P98/A8/RXD1
J1 P20/SI4
L9 PCM4
N3 P910/A10/SI2
J2 P91/A1
L10 PCT2
N4 P912/A12/SCK2
J3 P90/A0
J11 PDL5/AD5/FLMD1Note 1
L11 PCT0/WR0
L12 PDL1/AD1
N5 PCS7
N6 PCS6
J12 PDL7/AD7
L13 PDL2/AD2
N7 PCS1/CS1
J13 PDL6/AD6
M1 P95/A5/TO3
N8 PCS3/CS3
K1 P22/SCK4
M2 P97/A7/TO5
N9 PCM5
K2 P92/A2/INTP5
M3 P99/A9/TXD1
N10 PCM3/HLDRQ
K3 P21/SO4
M4 P913/A13/SI3
N11 PCT1/WR1
K11 PCM1/CLKOUT
M5 EVSS
N12 PCT5
K12 PDL4/AD4
M6 PCS5
N13 PCT6/ASTB
Notes 1. FLMD0 and FLMD1 are valid only for µPD70F3204Y and 70F3204Y.
2. IC: Connect directly to VSS (µPD703204, 703204Y).
FLMD0: Connect to VSS in normal mode (µPD70F3204, 70F3204Y).
Preliminary Product Information U15436EJ1V0PM
5

5 Page





UPD70F3204Y arduino
µPD703201, 703201Y, 703204, 703204Y, 70F3201, 70F3201Y, 70F3204, 70F3204Y
1. PIN FUNCTIONS
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1.1 Port Pins
Pin Name
I/O PULL
Function
P00 I/O Yes Port 0
P01 6-bit I/O port
Input/output can be specified in 1-bit units.
P02
P03
P04
P05
[P20]
[P21]
[P22]
I/O Yes Port 2
3-bit I/O port
Input/output can be specified in 1-bit units.
N-ch open drain can be specified in 1-bit units (P21, P22 only).
P30 I/O Yes Port 3
P31 3-bit I/O port
Input/output can be specified in 1-bit units.
P32 N-ch open drain can be specified in 1-bit units (P31, P32 only).
P40 I/O Yes Port 4
P41 7-bit I/O port
Input/output can be specified in 1-bit units.
P42 N-ch open drain can be specified in 1-bit units (P41, P42 only).
P43
P44
P45
P46
P70
Input No
Port 7
P71 12-bit input port (V850ES/SA2)
16-bit input port (V850ES/SA3)
P72
P73
P74
P75
P76
P77
P78
P79
P710
P711
[P712]
[P713]
[P714]
[P715]
Note Applies to the µPD703201Y, 703204Y, 70F3201Y, and 70F3204Y only.
(1/3)
Alternate Function
NMI
INTP0/TI2
INTP1/TI3
INTP2/TI4
INTP3/TI5
INTP4
[SI4]
[SO4]
[SCK4]
SI1/RXD0
SO1/TXD0
SCK1
SI0
SO0/SDANote
SCK0/SCLNote
INTP00/TI0/TCLR0
INTP01/TO0
INTP10/TI1/TCLR1
INTP11/TO1
ANI0
ANI1
ANI2
ANI3
ANI4
ANI5
ANI6
ANI7
ANI8
ANI9
ANI10
ANI11
[ANI12]
[ANI13]
[ANI14]
[ANI15]
Remarks 1. PULL: On-chip pull-up resistor
2. Pins in brackets ([ ]) are only for the V850ES/SA3.
Preliminary Product Information U15436EJ1V0PM
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