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PDF LA74310LP Data sheet ( Hoja de datos )
| Número de pieza | LA74310LP | |
| Descripción | Monolithic Linear IC Audio Interface for DSC Video Driver | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : ENA0904
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LA74310LP
Monolithic Linear IC
Audio Interface for DSC
+ Video Driver
Overview
The LA74310LP is an AV interface IC for digital still cameras (DSCs). It incorporates all the functions necessary for
analog audio signal processing for microphone and loudspeaker amplifiers. It also incorporates video output drivers that
require no output coupling capacity. The IC is ideal for reducing the number of components and further miniaturization of
digital still cameras.
Features
AUDIO INTERFACE block
• Three-wire type SERIAL communication • MIC AMP,
MIC power supply incorporated (with built-in pull-up resistor)
• ALC
• PB input method: Analog or digital for inputting (∆Σ) signal
• 3rd order LPF (for REC/PB switching control, option of fc=4kHz or 11kHz)
• SPEAKER AMP (The BEEP signal can be mixed.),
with electronic VOLUME (controlled by Serial communication)
• LINE output (with SERIAL MUTE)
• STANDBY control (current drain < 10µA)
VIDEO DRIVER block
• Not requires output coupling capacity
• Low voltage drive (VCC=2.7V to 3.6V)
• V sag does not occur
• 6th order LPF (fc=9MHz) is built-in.
• 0µA current dissipation on standby mode.
• 3 ways amplifier gains (6, 12, 16dB) can be selected. (Pin control (GND/Open/VCC))
• The video output has the capacity where one load of 75Ω impedance can be driven.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
91207 TI IM B8-9167 No.A0904-1/22
1 page  
LA74310LP
Description of the Content of Serial Communication
DATA No.
Parameter
0 DUMMY
1 LPF Cut-off frequency SW
0:11kHz, 1:4kHz
2 VREF capacitor charging circuit control SW
0:ON, 1:OFF
3 MIC AMP POWER SW
0:ON, 1:OFF
4 ALC AMP POWER SW
0:ON, 1:OFF
5 LPF1 MODE SW
0:PB MODE1, 1:REC MODE
6 LPF1/LPF2 selection SW
0:LPF1, 1:LPF2
7 REC BLOCK POWER SW
0:ON, 1:OFF
8 LINE OUT POWER SW
0:ON, 1:OFF
9 LINE MUTE SW
0:ON, 1:OFF
10 SPK POWER SW
0:ON, 1:OFF
11 DATA=1
1 1 1 1 1: VOL MAX
12 DATA=2
to
13 DATA=4
0 0 0 0 0: VOL MIN (MUTE)
14 DATA=8
* EVR setting (the numeral shown in the left is decimal.
15 DATA=16
For characteristics, see P12.)
Serial Transmission Timing
CS
tCS
CLOCK
DATA
LSB
fMAX
tDS tDH
tWH tWL
tCH tWC
MSB
• fMAX
• tWL
• tWH
• tCS
• tCH
• tDS
• tDH
• tWC
• VIH
• VIL
(Max clock frequency)
(Clock pulse width: Low)
(Clock pulse width: High)
(Chip enable setup time)
(Chip enable hold time)
(Data setup time)
(Data hold time)
(Chip enable pulse width)
(High voltage lower limit)
(Low voltage upper limit)
1.5MHz
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
333ns or more
2.3V to 3.5V
0V to 0.7V
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Default
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
0
VIH
VIL
VIH
VIL
VIH
VIL
No.A0904-5/22
5 Page 
LA74310LP
LA74310LP Internal Equivalent Diagram and Recommended Circuit Dwiwawg.DraatmaSheet4U.com
To MCOM VDD
VCCA
1µF
NC
30 29 28
DATA CLOCK
27 26
LINE STANDBY
CS OUT LOW
0.1µF
0.01µF
BEEPIN
25 24 23 22 21
0.047µF
NC 31
GAIN CTL
TO VCC
32
1µF
From
DAC
33
STANDBY HIGH
34
35
NC 36
CLOCKOUT
37
2.2µF
ND 38
VCCN
39
2.2µF
40
75Ω
LPF
+16dB
Minus
Voltage
Generator
Video
OUT
1 23
VCC
4.7µF
1BiT
DA IN
LOGIC
MUTE
MIX ratio +
1:1
EVR
20
19 NC
- + 18
17
SPK
8Ω
LPF2
45
NC
REC
OUT
LPF1
CBA
See Table 2
See Table 1
CHARGE
16
15
14
13 NC
VCCSP
1µF
VREF
12
DET ALC
67
-
+
70kΩ
2.2kΩ
11
MIC
VCC
8 9 10
0.01µF
0.47µF
0.01µF
4.7µF
MIC IN
ILA07164
NC PIN handling
This pin is electrically open and can be connected to GND with no problem.
However, we recommend you to make a foot pattern of a form similar to other pins to assure good balance after
mounting.
Table 1: Logic of external capacitor charging circuit
SERIAL
No.2
ON 0
OFF
1
Initially “ON”
Table 2: LPF SW control logic
SERIAL
No.5
A1
B0
C0
No.6
*
0
1
*) Don’t care.
No.A0904-11/22
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet LA74310LP.PDF ] | |
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