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PDF LC72344W Data sheet ( Hoja de datos )

Número de pieza LC72344W
Descripción Low-Voltage ETR Controller with On-Chip DC-DC Converter
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC72344W Hoja de datos, Descripción, Manual

Ordering number : ENN6171
CMOS IC
LC72344W, 72345W
Low-Voltage ETR Controller with On-Chip DC-DC
Converter
Overview
The LC72344W and LC72345W are low-voltage
electronic tuning microcontrollers that include a DC-DC
converter, a PLL that operates up to 230 MHz, a 1/4 duty
1/2 bias LCD driver and other functions on chip. The
built-in DC-DC converter provided by these ICs can easily
implement a tuning system voltage generator circuit, and
furthermore, since the transistor required for the low-pass
filter is built in, these ICs can contribute to further end
product cost reductions. Additionally, the DC-DC
converter output voltage can be provided to other external
ICs, making these products optimal for low-voltage
portable audio equipment that includes a radio receiver.
Functions
• Program memory (ROM): 3072 × 16 bits (6 KB)
LC72344W
4096 × 16 bits (8 KB)
LC72345W
• Data memory (RAM): 192 × 4 bits LC72344W
256 × 4 bits LC72345W
• Cycle time: 40 µs (all 1-word instructions)
• Stack: 8 levels
• LCD driver: 48 to 76 segments (1/4 duty, 1/2 bias drive)
• Interrupts: One external interrupt
Timer interrupts (1, 5, 10, and 50 ms)
• A/D converter: Two input channels (5-bit successive
approximation conversion)
• Input ports: 6 ports (of which 2 can be switched for use
as A/D converter inputs)
• Output ports: 6 ports (of which 1 can be switched for use
as the beep tone output and 2 are open-
drain ports)
• I/O ports: 16 ports (of which 8 can be switched for use
as LCD ports as mask options)
(Continued on next page.)
Package Dimensions
unit: mm
3190-SQFP64
[LC72344W, 72345W]
12.0
10.0
1.25 0.5 0.18
48
49
1.25
33
32
0.15
64
1
17
16
0.5 0.5
SANYO: SQFP64
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
31000RM (OT) No. 6171-1/13

1 page




LC72344W pdf
LC72344W, 72345W
*1 Halt mode current drain test conditions
7 pF
IDD1
A
75 kHz
7 pF
XOUT VDD
XIN
PA,PF
AIN
VSS
FMIN
AMIN
AGND
TEST1, 2
RES
VDC2
VDC3
BATT
IDD2
A
A
IDD3
1.5 V
*2 Backup mode current drain test conditions
7 pF
IDD1
A
2.2 V
3V
75 kHz
7 pF
XOUT
XIN
VDD
AIN
VSS
FMIN
AMIN
AGND
TEST1, 2
RES
VDC2
VDC3
BATT
IDD2
A
A
IDD3
1.5 V
2.2 V
3V
Leave all ports other than those mentioned above open.
Select output mode for PC and PD.
Select the segment function for S12 to S19.
Leave all ports other than those mentioned above open.
Select output mode for PC and PD.
Select the segment function for S12 to S19.
No. 6171-5/13

5 Page





LC72344W arduino
LC72344W, 72345W
LC72344W and LC72345W Instruction Set
Terminology
ADDR
: Program memory address
b : Borrow
C : Carry
DH : Data memory address High (Row address) [2 bits]
DL : Data memory address Low (Column address) [4 bits]
I : Immediate data [4 bits]
M : Data memory address
N : Bit position [4 bits]
Rn : Resister number [4 bits]
Pn : Port number [4 bits]
PW : Port control word number [4 bits]
r : General register (One of the address from 00H to 0FH of BANKO)
( ), [ ]
: Contents of register or memory
M (DH, DL) : Data memory specified by DH, DL
Mnemonic
AD
ADS
AC
ACS
AI
AIS
AIC
AICS
SU
SUS
SB
SBS
SI
SIS
SIB
SIBS
Operand
1st 2nd
rM
rM
rM
rM
MI
MI
MI
MI
rM
rM
rM
rM
MI
MI
MI
MI
Function
Add M to r
Add M to r, then skip if carry
Add M to r with carry
Add M to r with carry,
then skip if carry
Add I to M
Add I to M, then skip if carry
Add I to M with carry
Add I to M with carry,
then skip if carry
Subtract M from r
Subtract M from r,
then skip if borrow
Subtract M from r with borrow
Subtract M from r with borrow,
then skip if borrow
Subtract I from M
Subract I from M,
then skip if borrow
Subtract I from M with borrow
Subtract I from M with borrow,
then skip if borrow
Operational function
Instruction format
f edcba9876543210
r (r) + (M)
0 1 0 0 0 0 DH
DL
r
r (r) + (M), skip if carry 0 1 0 0 0 1 DH
DL
r
r (r) + (M) + C
0 1 0 0 1 0 DH
DL
r
r (r) + (M) + C
skip if carry
0 1 0 0 1 1 DH
DL
r
M (M) + I
0 1 0 1 0 0 DH
DL
I
M (M) + I, skip if carry 0 1 0 1 0 1 DH
DL
I
M (M) + I + C
0 1 0 1 1 0 DH
DL
I
M (M) + I + C,
skip if carry
0 1 0 1 1 1 DH
DL
I
r (r) – (M)
0 1 1 0 0 0 DH
DL
r
r (r) – (M),
skip if borrow
0 1 1 0 0 1 DH
DL
r
r (r) – (M) – b
0 1 1 0 1 0 DH
DL
r
r (r) – (M) – b,
skip if borrow
0 1 1 0 1 1 DH
DL
r
M (M) – I
0 1 1 1 0 0 DH
DL
I
M (M) – I,
skip if borrow
0 1 1 1 0 1 DH
DL
I
M (M) – I – b
0 1 1 1 1 0 DH
DL
I
M (M) – I – b,
skip if borrow
0 1 1 1 1 1 DH
DL
I
Continued on next page.
No. 6171-11/13

11 Page







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