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PDF TEA1751LT Data sheet ( Hoja de datos )

Número de pieza TEA1751LT
Descripción GreenChip III SMPS control IC
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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TEA1751T; TEA1751LT
GreenChip III SMPS control IC
Rev. 02 — 23 December 2009
www.DataSheet4U.com
Product data sheet
1. General description
The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS)
controller ICs. The TEA1751(L)T (TEA1751T and TEA1751LT) combines a controller for
Power Factor Correction (PFC) and a flyback controller. Its high level of integration allows
the design of a cost-effective power supply with a very low number of external
components.
The special built-in green functions provide high efficiency at all power levels. This applies
to quasi-resonant operation at high power levels, quasi-resonant operation with valley
skipping, as well as to reduced frequency operation at lower power levels. At low power
levels, the PFC switches off to maintain high efficiency.
During low power conditions, the flyback controller switches to frequency reduction mode
and limits the peak current to 25 % of its maximum value. This will ensure high efficiency
at low power and good standby power performance while minimizing audible noise from
the transformer.
The TEA1751(L)T is a MultiChip Module, (MCM), containing two chips. The proprietary
high voltage BCD800 process which makes direct start-up possible from the rectified
universal mains voltage in an effective and green way. The second low voltage SIlicon On
Insulator (SIOI) is used for accurate, high speed protection functions and control.
The TEA1751(L)T enables highly efficient and reliable supplies with power requirements
up to 250 W, to be designed easily and with a minimum number of external components.
2. Features
2.1 Distinctive features
„ Integrated PFC and flyback controller.
„ Universal mains supply operation (70 V (AC) to 276 V (AC)).
„ Dual boost PFC with accurate maximum output voltage (NXP patented).
„ High level of integration, resulting in a very low external component count and a
cost-effective design.
2.2 Green features
„ On-chip start-up current source.

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TEA1751LT pdf
NXP Semiconductors
TEA1751T; TEA1751LT
GreenChiwpwIwII.DSaMtaPSSheceot4nUt.rcoolmIC
7. Functional description
7.1 General control
The TEA1751(L)T contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. A typical configuration is shown in Figure 3.
12 11
8
6
9 16 13
10
TEA1751(L)T
7
4
3 21
014aaa301
Fig 3. Typical configuration
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
Initially the capacitor on the VCC pin is charged from the high voltage mains via the HV pin.
As long as VCC is below Vtrip, the charge current is low. This protects the IC if the VCC pin
is shorted to ground. For a short start-up time the charge current above Vtrip is increased
until VCC reaches Vth(UVLO). If VCC is between Vth(UVLO) and Vstartup, the charge current is
low again, ensuring a low duty cycle during fault conditions.
The control logic activates the internal circuitry and switches off the HV charge current
when the voltage on pin VCC passes the Vstartup level. First, the LATCH pin current source
is activated and the soft start capacitors on the PFCSENSE and FBSENSE pins are
charged. When the LATCH pin voltage exceeds the Ven(LATCH) voltage and the soft start
capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. Also the flyback
converter is activated (providing the soft start capacitor on the FBSENSE pin is charged).
The output voltage of the flyback converter is then regulated to its nominal output voltage.
The IC supply is taken over by the auxiliary winding of the flyback converter. See Figure 4.
If during start-up the LATCH pin does not reach the Ven(LATCH) level before VCC reaches
Vth(UVLO), the LATCH pin output is deactivated and the charge current is switched on
again.
TEA1751T_LT_2
Product data sheet
Rev. 02 — 23 December 2009
© NXP B.V. 2009. All rights reserved.
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TEA1751LT arduino
NXP Semiconductors
TEA1751T; TEA1751LT
GreenChiwpwIwII.DSaMtaPSSheceot4nUt.rcoolmIC
2.2 V
VVINSENSE
15 μA
II(VOSENSE)
014aaa097
Fig 6. Voltage to current transfer function for dual boost PFC
7.2.8 Overcurrent protection (PFCSENSE pin)
The maximum peak current is limited cycle-by-cycle by sensing the voltage across an
external sense resistor, RSENSE1, on the source of the external MOSFET. The voltage is
measured via the PFCSENSE pin.
7.2.9 Mains undervoltage lockout / brownout protection (VINSENSE pin)
To prevent the PFC from operating at very low mains input voltages, the voltage on the
VINSENSE pin is sensed continuously. As soon as the voltage on this pin drops below the
Vstop(VINSENSE) level, switching of the PFC is stopped.
The voltage on pin VINSENSE is clamped to a minimum value,
Vstart(VINSENSE) + ΔVpu(VINSENSE), for a fast restart as soon as the mains input voltage is
restored after a mains dropout.
7.2.10 Overvoltage protection (VOSENSE pin)
To prevent output overvoltage during load steps and mains transients, an overvoltage
protection circuit is built in.
As soon as the voltage on the VOSENSE pin exceeds the Vovp(VOSENSE) level, switching
of the power factor correction circuit is inhibited. Switching of the PFC recommences as
soon as the VOSENSE pin voltage drops below the Vovp(VOSENSE) level again.
When the resistor between pin VOSENSE and ground is open, the overvoltage protection
is also triggered.
7.2.11 PFC open loop protection (VOSENSE pin)
The power factor correction circuit does not start switching until the voltage on the
VOSENSE pin is above the Vth(ol)(VOSENSE) level. This protects the circuit from open loop
and VOSENSE short situations.
7.2.12 Driver (pin PFCDRIVER)
The driver circuit to the gate of the power MOSFET has a current sourcing capability of
typically 500 mA and a current sink capability of typically 1.2 A. This permits fast turn-on
and turn-off of the power MOSFET for efficient operation.
TEA1751T_LT_2
Product data sheet
Rev. 02 — 23 December 2009
© NXP B.V. 2009. All rights reserved.
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