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PDF LC72148V Data sheet ( Hoja de datos )

Número de pieza LC72148V
Descripción Electronic Tuning PLL Frequency Synthesizer for Car Stereo Systems
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC72148V Hoja de datos, Descripción, Manual

Ordering number : ENN6974A
CMOS IC
LC72148V
Electronic Tuning PLL Frequency Synthesizer
for Car Stereo Systems
Overview
The LC72148V is a 3 V version of the LC72146 PLL
frequency synthesizer that can easily implement a variety
of 3 V power supply tuners, including in-car navigation
system receivers based on the VICS FM multiplex system.
Functions
• High-speed programmable divider
— FMIN: 10 to 180 MHz ... Pulse swallower technique
— AMIN: 2 to 40 MHz ... Pulse swallower technique
0.5 to 10 MHz ... Direct division technique
• IF counters
— HCTR: 0.4 to 25 MHz ... Frequency measurement
— LCTR: 10 to 500 kHz ... Frequency measurement
1.0 to 20 × 103 Hz ... Period measurement
• Reference frequency
— One of 12 reference frequencies can be selected
(Crystal resonator: 7.2 or 4.5 MHz)
1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 25, 30, 50, and
100 kHz
• Phase comparator
— Provides dead zone control
— Built-in unlock detection circuit
— Built-in deadlock clear circuit
— Sub-charge pump for high-speed locking
• Built-in MOS transistor for implementing an active low-
pass filter
• I/O ports: Five general-purpose I/O ports.
— Input: 7 pins (maximum)
— Output: 7 pins (maximum. N-channel: 4 pins,
CMOS: 3 pins)
— A clock time base signal (8 Hz) can be output.
• Serial data I/O
— Supports communication with a controller in the
CCB format.
— Uses the same serial data as the LC72146.
• Operating ranges
— Supply voltage: 2.7 to 3.6 V
— Operating temperature: –40 to +85°C
• Package
— SSOP24
Package Dimensions
unit: mm
3175B-SSOP24
[LC72148V]
7.8
24
1
(0.33) 0.65 0.22
0.15
SANYO: SSOP24
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
41202RM (OT)/70601RM (OT) No. 6974-

1 page




LC72148V pdf
Pin Functions
Pin No.
Symbol
Type
24 XIN
X’tal
1 XOUT
LC72148V
Function
• Crystal resonator connections (7.2 or 4.5 MHz)
Pin circuit
• FMIN is selected when DVS in the serial data input is set to 1.
17
FMIN
Local oscillator
signal input
• The input frequency range is 10 to 180 MHz.
• The signal is directly transmitted to the swallow counter.
• The divisor can be set to a value in the range 272 to 65,535.
• AMIN is selected when DVS in the serial data input is set to 0.
• When SNS in the serial data input is set to 1:
—The input frequency range is 2 to 40 MHz.
—The signal is directly transmitted to the swallow counter.
16
AMIN
Local oscillator
signal input
—The divisor can be set to a value in the range 272 to 65,535.
• When SNS in the serial data input is set to 0:
—The input frequency range is 0.5 to 10 MHz.
—The signal is directly transmitted to the 12-bit programmable divider.
—The divisor can be set to a value in the range 5 to 4,095.
2
CE Chip enable
• This pin must be set to the high level during serial data input (DI) from, or
serial data output (DO) to, the LC72148V.
S
3
DI Input data
• Input pin for serial data transmitted from the controller to the LC72148V.
S
4 CL Clock
• Data synchronization clock used during serial data input (DI) from, or
serial data output (DO) to, the LC72148V.
• Data output pin for data output from the LC72148V to the controller.
5 DO Output data The content of the data output is determined by the ULD, DT0, and DT1
bits in the serial data.
15
VDD Power supply
• The LC72148V power supply pin. (VDD = 2.7 to 3.6 V)
• The power-on reset circuit operates when power is first applied.
18 VSSd Ground
• Digital system ground for the LC72148V
S
———
———
• Connections to the internal n-channel MOS transistor provided to
21 AIN
implement an active low-pass filter for the PLL.
22
AOUT
Low-pass filter
• A high-speed locking circuit can be implemented by using these pins in
amplifier transistor conjunction with the built-in sub-charge pump.
23 VSSa
• See the item describing the structure of the charge pump for details.
• Vssa is a dedicated ground pin.
• Input/output shared-function pins
• In output mode, the circuits are open-drain outputs.
• The I/O direction is determined by I/O-1 to I/O-3 in the serial data.
When the data is 0: input port
When 1: output port
• When specified for use as input ports
12 I/O-1
11
I/O-2
General-purpose
I/O ports
The input pin states are transmitted from the DO pin to the controller
Input state = low : Data = 0
10 I/O-3
Input state = high : Data = 1
• When specified for use as output ports
The output states are determined by OUT1 to OUT3 in the serial data.
Data = 0 : low
Data = 1 : open
• These pins are set to function as input ports by the power-on reset.
Continued on next page.
No. 6974-5/21

5 Page





LC72148V arduino
LC72148V
Continued from preceding page.
Number Control block/data
Description
• CTS1 and CTS0 select the input pin (HCTR or LCTR) for the general-purpose counter.
CTS1
1
0
0
CTS0
*
1
0
Input pin
HCTR
LCTR
LCTR
Measurement mode
Frequency
Frequency
Period
Related data
General-purpose counter
control data
CTS0, CTS1
• CTE controls the general-purpose counter measurement operation.
CTE = 1: Starts the count
= 0: Resets the counter
• GT1 and GT0 determine the general-purpose counter measurement time (in frequency mode)
CTE
and number of periods (in period mode)
(6) GT0, GT1
GT1
Frequency measurement
GT0
Measurement time
Wait time
Period measurement
CTP
00
4 ms
3 to 4 ms
1 period
CTC
01
8
3 to 4
1 period
10
32
7 to 8
2 periods
11
64
7 to 8
2 periods
• When CTE is 0, pulling down the input is disabled by setting CTP to 1.
Note: The wait time will be 1 to 2 ms.
However, CTP must be set to 1 at least 4 ms before CTE is set to 1.
• The input sensitivity is reduced when CTC is set to 1. (Sensitivity: 10 to 30 mVrms)
* See the “Structure of the General-Purpose Counter” item for details.
H/I-6
L/I-7
I/O port control data • This data specifies the I/O direction of the shared-function I/O pins (I/O-1 to I/O-5).
(7) Data = 0: Input port
I/O-1 to I/O-5
= 1: Output port
OUT1 to OUT5
ULD
• This data determines the output from the output ports O-1 to O-7.
(8)
Output port data
OUT1 to OUT7
Data = 0: Low
= 1: Open or high
• This data is invalid if input port operation or unlocked state output is specified.
• Sets the general-purpose counter pins to function as input ports.
General-purpose counter H/I-6 = 0: I-6 (input port)
(9) input control data
= 1: HCTR (general-purpose counter)
H/I-6, L/I-7
L/I-3 = 0: I-7 (input port)
= 1: LCTR (general-purpose counter)
• UL0 and UL1 select the phase error (øE) detection width used for judging the PLL locked state.
If a phase error in excess of the widths listed in the table below occurs, the PLL will be seen to
be in the unlocked state. When unlocked, the detection pin goes low.
(* : don’t care)
Unlocked state detection
(10) data
UL0, UL1
UL1 UL0
00
01
10
11
øE detection width
Stopped
0
±0.56 µs
±1.11 µs
Detection output
Open
øE is output directly.
øE is extended by 1 to 2 ms.
øE is extended by 1 to 2 ms.
I/O-1 to I/O-5
ULD
CTS0
CTS1
ULD
DT0, DT1
øE
DO
I/O-5
1 to 2 ms Extension
Unlocked state output
Continued on next page.
No. 6974-11/21

11 Page







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