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PDF TC7WP3125FK Data sheet ( Hoja de datos )
| Número de pieza | TC7WP3125FK | |
| Descripción | Digital Integrated Circuit Silicon Monolithic Low Voltage/Low Power 2-Bit Dual Supply Bus Buffer | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TC7WP3125FK/FC
TOSHIBA Digital Integrated Circuit Silicon Monolithic www.DataSheet4U.com
TC7WP3125FK, TC7WP3125FC
Low Voltage/Low Power 2-Bit Dual Supply Bus Buffer
The TC7WP3125 is a dual supply, advanced high-speed CMOS
2-bit dual supply voltage interface bus buffer fabricated with
silicon gate CMOS technology.
It is also designed with over voltage tolerant inputs and
outputs up to 3.6 V.
Designed for use as an interface between a 1.2-V, 1.5-V, 1.8-V,
or 2.5-V bus and a 1.8-V, 2.5-V or 3.6-V bus in mixed 1.2-V, 1.5-V,
1.8-V or 2.5-V/1.8-V, 2.5-V or 3.6-V supply systems.
The A-input interfaces with the 1.2-V, 1.5-V, 1.8-V or 2.5-V bus,
the B-output with the 1.8-V, 2.5-V, 3.3-V bus.
The enable input (OE) can be used to disable the device so that
the signal lines are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC7WP3125FK
TC7WP3125FC
Features
Weight:
SSOP8-P-0.50A : 0.01 g (typ.)
CSON8-P-0.4 : 0.002 g (typ.)
• Level converter for interfacing 1.2-V to 1.8-V, 1.2-V to 2.5-V, 1.2-V to 3.3-V, 1.5-V to 2.5-V, 1.5-V to 3.3-V, 1.8-V
to 2.5-V, 1.8-V to 3.3-V or 2.5 V to 3.3-V system.
• High-speed operation : tpd = 6.8 ns (max) (VCCA = 2.5 ± 0.2 V, VCCB = 3.3 ± 0.3 V)
tpd = 7.8 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V)
tpd = 8.6 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V)
tpd = 22 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V)
tpd = 9.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.5 ± 0.2 V)
tpd = 10.8 ns (max) (VCCA = 1.5 ± 0.15 V, VCCB = 2.5 ± 0.2 V)
tpd = 23 ns (max) (VCCA = 1.2 ± 0.15 V, VCCB = 2.5 ± 0.2 V)
tpd = 30 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 1.8 ± 0.15 V)
• Output current : IOH/IOL = ±12 mA (min) (VCC = 3.0 V)
IOH/IOL = ±9mA (min) (VCC = 2.3 V)
IOH/IOL = ±3 mA (min) (VCC = 1.65 V)
• Latch-up performance: -300 mA
• ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
• Ultra-small package: CSON8(CST8), SSOP8(US8)
• Low current consumption : Using the new circuit significantly reduces current consumption when OE = “H”.
Suitable for battery-driven applications such as PDAs and cellular phones.
• 3.6-V tolerant function and power-down protection provided on all inputs and outputs.
Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.
1 2007-10-19
1 page  
AC Characteristics (Ta = −40 to 85°C, Input: tr = tf = 2.0 ns)
VCCA = 2.5 ± 0.2 V, VCCB= 3.3 ± 0.3 V
TC7WP3125FK/FC
www.DataSheet4U.com
Characteristics
Symbol
Test Condition
Min Max Unit
Propagation delay time
(An → Bn)
3-state output enable time
( OE → Bn)
3-state output disable time
( OE → Bn)
Output to output skew
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
tosLH
tosHL
Figure 1, Figure 2
Figure 1, Figure 3
Figure 1, Figure 3
1.0 6.8
1.0 8.7
ns
1.0 3.9
(Note) ⎯ 0.5 ns
Note: Parameter guaranteed by design.
(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)
VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V
Characteristics
Symbol
Test Condition
Min Max Unit
Propagation delay time
(An → Bn)
3-state output enable time
( OE → Bn)
3-state output disable time
( OE → Bn)
Output to output skew
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
tosLH
tosHL
Figure 1, Figure 2
Figure 1, Figure 3
Figure 1, Figure 3
1.0 7.8
1.0 10.7 ns
1.0 5.2
(Note) ⎯ 0.5 ns
Note: Parameter guaranteed by design.
(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)
VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V
Characteristics
Symbol
Test Condition
Min Max Unit
Propagation delay time
(An → Bn)
3-state output enable time
( OE → Bn)
3-state output disable time
( OE → Bn)
Output to output skew
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
tosLH
tosHL
Figure 1, Figure 2
Figure 1, Figure 3
Figure 1, Figure 3
1.0 8.6
1.0 14.3 ns
1.0 6.6
(Note) ⎯ 1.5 ns
Note: Parameter guaranteed by design.
(tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|)
5 2007-10-19
5 Page 
Package Dimensions
CSON8-P-0.4
TC7WP3125FK/FC
www.DataSheet4U.com
Weight: 0.002 g (typ.)
11 2007-10-19
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet TC7WP3125FK.PDF ] | |
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| TC7WP3125FC | Digital Integrated Circuit Silicon Monolithic Low Voltage/Low Power 2-Bit Dual Supply Bus Buffer | Toshiba Semiconductor |
| TC7WP3125FK | Digital Integrated Circuit Silicon Monolithic Low Voltage/Low Power 2-Bit Dual Supply Bus Buffer | Toshiba Semiconductor |
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