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PDF IDT7M9514 Data sheet ( Hoja de datos )
| Número de pieza | IDT7M9514 | |
| Descripción | (IDT7M9510 / IDT7M9514) PCI MEZZANINE CARD | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IDT7M9514 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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IDT79RV4640/IDT79RC64V474
PCI MEZZANINE CARD
www.DataSheet4U.com
PRELIMINARY
IDT7M9510
IDT7M9514
FEATURES:
• PCI Mezzanine Card (PMC) (IEEE 1386) form factor
• 7M9510 High performance IDT79RV4640 MIPS Processor
– 100Mhz, 150Mhz, 180Mhz, 200MHz CPU speeds supported
– 50MHz maximum CPU bus frequency
– 33MHz maximum PCI bus frequency
• 7M9514 High performance IDT79RC64V474 MIPS Processor
– 180Mhz, 200Mhz, 250Mhz CPU speeds supported
– 50MHz maximum CPU bus frequency
– 33MHz maximum PCI bus frequency
• DRAM
– 72-position SIMM slot
– 4MB to 128MB of DRAM supported
– 32-bit width
• Flash
– 2MB of on board Flash memory
– 32-bit width
• EPROM
– up to 512KB
– 8-bit width
– 32 Pin PLCC socket
• Two serial interface ports (16550A compatible)
• Uses Galileo GT-64011 PCI System controller
– DMA
– four independent channels
– chaining via linked lists of records
– byte alignment on source and destination
– transfers through a 32 byte internal FIFO
which moves data between PCI, memory and devices
– PCI
– host to PCI bridge
– PCI to main memory bridge
– fully compatible to PCI rev 2.1
– high performance PCI interfaces via 96 bytes of posted write
and read prefetch buffers
• Other Features
– Manual Cold Reset (Pushbutton and two pin header)
– hardware based masking of interrupts
– Configurable Timer Interrupt Generator
– 32 Bits of user defined I/O mapped through system FPGA
– VxWorks Board Support Package available from IDT
DESCRIPTION:
The IDT7M9510/7M9514 is a Single Board Computer utilizing IDT's
79RV4640/79RC64V474 MIPS processor. This CPU Mezzanine Card is
designed for use in applications where low profile, parallel board to board
mounting is required. The 7M9510/7M9514 consists of an IDT79RV4640 /
IDT79RC64V474 processor based subsystem that can either form the core
CPU function for an embedded application, or can be an optional add-in
accelerator to a PCI based system through a PCI v2.1 compatible, PMC
Standard (IEEE P1386.1) connector.
The card conforms, in length and width to the standard single size PMC form
factor as specified in IEEE P1386.1, and it contains all the features required of
atypicalCPUsubsystemforembeddedprocessorapplications. Someofthese
features include: DRAM, Flash, serial ports and full PCI interrupt support.
FUNCTIONAL BLOCK DIAGRAM
Device Bus
EPROM
PMC User I/O Header
8
Serial
connector
Serial
connector
Flash
32
SIO
Watch Dog
T im e r
System
FPGA
32
ID T
RV4640/
RC64V474
DRAM
32
© 1999 Integrated Device Technology, Inc.
GT-64011
32
33Mhz
PCI Bus
4095 drw 01
March 1999
1
1 page  
IDT7M9510 / IDT7M9514
PMC CONNECTORS
The 7M9510 / 7M9514 utilizes three 64 position connectors that are
compliant with the PMC standard. The placement of these connectors is in
compliance with the Common Mezzanine Card (CMC) Specification (IEEE
1386) and the PCI Mezzanine Card (PMC) Specification (IEEE 1386.1).
Headers correspond as follows:
-J1 on the 7M9510 / 7M9514 corresponds to PN11 (PN1) and P12
(PN2) in the PMC and CMC Specifications.
-J2 on the 7M9510 / 7M9514 corresponds to P14 (PN4) in the PMC
and CMC Specifications.
For further information on the mechanical placement of the PMC
headers, refer to the Common Mezzanine Card (CMC) Specification (IEEE
1386).
IDT
www.DataSheet4U.com
PIN ASSIGNMENTS
The 32-bit bus is implemented in J1 (PN1 and PN2), in compliance with
the PMC Specifications and is provided below. The User-Defined I/O is
implemented in J2 (PN4) and is provided below.
PN1
Pin # Signal Name
1 TCK
Signal Name
-12V (1)
3 GND
INTA#
5 INTB#
INTC#
7 BUSMODEE1# +5v
9 INTD#
PCI-RSVD (1)
11 GND
PCI-RSVD (1)
13 CLK
GND
15 GND
GNT#
17 REQ#
19 V(I/O) (1)
+5V
AD[31]
21 AD[28]
AD[27]
23 AD[25]
GND
25 GND
C/BE[3]#
27 AD[22]
AD[21]
29 AD[19]
31 V(I/O) (1)
+5V
AD[17]
33 FRAME#
GND
35 GND
IRDY#
37 DEVSEL#
+5V
39 GND
41 SDONE#( (1)
LOCK#
SBO# (1)
43 PAR
45 V(I/O) (1)
GND
AD[15]
47 AD[12]
AD[11]
49 AD[09]
+5V
51 GND
C/BE[0]#
53 AD[06]
AD[05]
55 AD[04]
GND
57 V(I/O)
AD[13]
59 AD[02]
AD[01]
61 AD[00]
+5V
63 GND
REQ64#
NOTES:
1. Not connected on 7M9510 / 7M9514
Pin #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
4095 tbl 04
PN2
Pin # Signal Name
1 +12V (1)
3 TMS
5 TDI
7 GND
9 PCI-RSVD (1)
11 BUSMODE2# (1)
13 RST#
15 +3.3V
17 PCI-RSVD (1)
19 AD[30]
21 GND
23 AD[24]
25 IDSEL
27 +3.3V
29 AD]18]
31 AD[16]
33 GND
35 TRDY#
37 GND
39 PERR#
41 +3.3V
43 C/BE[1]#
45 AD[14]
47 GND
49 AD[08]
51 AD[07]
53 +3.3V
55 PMC-RSVD (1)
57 PMC-RSVD (1)
59 GND
61 ACK64# (1)
63 GND
Signal Name
TRST#
TDO
GND
PCI-RSVD (1)
PCI-RSVD (1)
+3.3V
BUSMODE3#
BUSMODE4#
GND
AD[29]
AD[26]
+3.3V
AD[23]
AD[20]
GND
C/BE[2]#
PMC-RSVD (1)
+3.3V
STOP#
GND
SERR#
GND
AD[13]
AD[10]
+3.3V
PMC-RSVD (1)
PMC-RSVD (1)
GND
PMC-RSVD (1)
PMC-RSVD (1)
+3.3V
PMC-RSVD (1)
Pin #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
4095 tbl 05
© 1999 Integrated Device Technology, Inc.
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT7M9514.PDF ] | |
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