PDF LE82GM965 Data sheet ( Hoja de datos )

Número de pieza	LE82GM965
Descripción	Mobile Chipset
Fabricantes	Intel
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Mobile Intel® 965 Express Chipset Family Datasheet Revision 003 June 2007 www.DataSheet4U.com 1 page 4.11 (G)MCH Decode Rules and Cross-Bridge Address Mapping....................................... 63 4.11.1 Legacy VGA and I/O Range Decode Rules .................................................. 63 5 System Memory Controller ...................................................................................... 65 5.1 Functional Overview .......................................................................................... 65 5.2 Memory Channel Access Modes ........................................................................... 65 5.2.1 Dual Channel Interleaved Mode ................................................................ 66 5.2.1.1 Intel® Flex Memory Technology (Dual Channel Interleaved Mode with Unequal Memory Population) ...................................................... 66 5.2.2 Dual Channel Non-Interleaved Mode ......................................................... 67 5.3 DRAM Technologies and Organization................................................................... 67 5.3.1 Rules for Populating SO-DIMM Slots.......................................................... 68 5.3.2 Pin Connectivity for Dual Channel Modes ................................................... 68 5.4 DRAM Clock Generation...................................................................................... 68 5.5 DDR2 On Die Termination................................................................................... 68 5.6 DRAM Power Management .................................................................................. 69 5.6.1 Self Refresh Entry and Exit Operation........................................................ 69 5.6.2 Dynamic Power Down Operation............................................................... 69 5.6.3 DRAM I/O Power Management ................................................................. 69 5.7 System Memory Throttling.................................................................................. 70 6 PCI Express Based External Graphics ...................................................................... 71 6.1 PCI Express Architecture .................................................................................... 71 6.1.1 Transaction Layer................................................................................... 71 6.1.2 Data Link Layer...................................................................................... 71 6.1.3 Physical Layer........................................................................................ 71 6.2 PCI Express Configuration Mechanism .................................................................. 72 6.3 Serial Digital Video Output (SDVO) ...................................................................... 73 6.3.1 SDVO Capabilities................................................................................... 73 6.3.2 Concurrent SDVO/PCI Express Operation ................................................... 74 6.3.2.1 SDVO Signal Mapping ................................................................ 75 6.4 SDVO Modes..................................................................................................... 76 7 Integrated Graphics Controller ................................................................................ 79 7.1 Graphics Processing........................................................................................... 80 7.1.1 3D Graphics Pipeline ............................................................................... 80 www.DataSheet4U.com 7.1.2 3D Engine ............................................................................................. 80 7.1.2.1 Setup Engine............................................................................ 80 7.1.2.2 Rasterizer ................................................................................ 81 7.1.2.3 Texture Engine ......................................................................... 82 7.1.3 2D Engine ............................................................................................. 84 7.1.3.1 Video Graphics Array Registers ................................................... 85 7.1.3.2 Logical 128-Bit Fixed BLT and 256 Fill Engine ............................... 85 7.1.3.3 HW Rotation............................................................................. 85 7.1.4 Video Engine ......................................................................................... 86 7.1.4.1 Dynamic Video Memory Technology (DVMT 4.0)............................ 86 7.1.4.2 Intel® Clear Video Technology ................................................... 86 7.1.4.3 Sub-Picture Support .................................................................. 90 8 Graphics Display Interfaces ..................................................................................... 91 8.1 Display Overview .............................................................................................. 91 8.2 Display Planes .................................................................................................. 91 8.2.1 DDC (Display Data Channel) .................................................................... 92 8.2.1.1 Source/Destination Color Keying/ChromaKeying............................ 92 8.2.1.2 Gamma Correction .................................................................... 92 8.3 Display Pipes .................................................................................................... 92 8.3.1 Clock Generator Units (DPLL)................................................................... 92 Datasheet 5 5 Page Introduction 1 Introduction Figure 1. The Mobile Intel® 965 Express Chipset family is designed for use in Intel’s next generation Intel® Centrino® Duo processor technology. Figure 1 provides a system block diagram. Intel® Centrino® Duo Processor Technology with Mobile Intel® 965 Express Chipset Family (G)MCH Analog CRT 2 SDVO Ports OR Discrete Graphics Intel® Core™2 Duo Processor for Mobile Intel® 965 Express Chipset Family FSB 533/800 MHz Analog TV PCI Express x16 Mobile Intel 965 Express Chipset Family Intel® Management Engine LVDS Flat Panel DDR2 SO-DIMMs 533/667 MHz DMI (x2/x4) Controller Link 0 Intel® Turbo Memory www.DataSheet4UIn.tceol®mWireless WiFi Link 4965AGN PCI Express PCI Express PCI Express PCI Express PCI Express* 6 PCI Express* x1 Ports Intel® 82566MM Gigabit Network Connection GLCI 10/100 LCI Intel® Management Engine Intel® 82801 HEM/HBM 3 Ports 1 Port SPI LPC USB 2.0 10 Ports Controller Link 1 LPC LPC Power Management PCI SMBUS 2.0 GPIO Serial ATA PATA Intel® HD Audio SPI Flash FWH TPM 1.2 SIO PCI Datasheet 11 11 Page

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