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PDF MAX16068 Data sheet ( Hoja de datos )
| Número de pieza | MAX16068 | |
| Descripción | Flash-Configurable System Manager | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-5040; Rev 0; 10/09
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
General Description
The MAX16068 flash-configurable system manager
monitors and manages up to six system voltages
simultaneously. The MAX16068 integrates an analog-
to-digital converter (ADC). Device configuration infor-
mation, including overvoltage and undervoltage limits,
time delay settings is stored in nonvolatile flash memory.
During a fault condition, fault flags and channel volt-
ages can be automatically stored in the nonvolatile flash
memory for later readback.
The internal 1% accurate, 10-bit ADC measures each
input and compares the result to one overvoltage and
one undervoltage limit. A fault signal asserts when a
monitored voltage falls outside the set limits.
The MAX16068 supports a power-supply voltage of up to
14V and can be powered directly from the 12V interme-
diate bus in many systems.
The MAX16068 includes six programmable general-
purpose inputs/outputs (GPIOs). GPIOs are flash con-
figurable as a fault output, as a watchdog input or output,
or as a manual reset.
The MAX16068 features nonvolatile fault memory for
recording information during system shutdown events.
The fault logger records a failure in the internal flash
and sets a lock bit protecting the stored fault data from
accidental erasure.
An SMBus™ or a JTAG serial interface configures the
www.DataMShAeXe1t46U0.c6o8m. The MAX16068 is available in a 28-pin, 5mm
x 5mm, TQFN package and is fully specified over the
-40NC to +85NC extended temperature range.
Features
S Operates from 2.8V to 14V
S 1% Accurate, 10-Bit ADC Monitors 6 Voltage
Inputs
S Analog EN Monitoring Input
S 6 Monitored Inputs with Overvoltage and
Undervoltage Limits
S Nonvolatile Fault Event Logger
S Six General-Purpose Inputs/Outputs Configurable
as:
Dedicated Fault Output
Watchdog Timer Function
Manual Reset
SMBus Alert
Fault Propagation Input/Output
S SMBus and JTAG Interface
S Supports Cascading with MAX16065/MAX16066
S Flash-Configurable Time Delays and Thresholds
S -40NC to +85NC Extended Operating Temperature
Range
Applications
Networking Equipment
Telecom Equipment (Base Stations, Access)
Storage/Raid Systems
Servers
Typical Operating Circuit appears at end of data sheet.
Ordering Information/Selector Guide
PART
PIN-PACKAGE
VOLTAGE-DETECTOR INPUTS
MAX16068ETI+
28 TQFN-EP*
6
Note: This device is specified over the -40NC to +85NC extended temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
GENERAL-PURPOSE INPUTS/
OUTPUTS
6
SMBus is a trademark of Intel Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
SDA
tSU:DAT
tLOW
SCL
tHD:STA
START
CONDITION
tHIGH
tR tF
Figure 1. SMBus Timing Diagram
tHD:DAT
tSU:STA
tHD:STA
REPEATED START
CONDITION
tSU:STO
tBUF
STOP
CONDITION
START
CONDITION
TCK
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t1
t2 t3
t4 t5
TDI, TMS
TDO
t6
t7
Figure 2. JTAG Timing Diagram
_______________________________________________________________________________________ 5
5 Page 
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
When in the monitoring state, and when EN falls below
the undervoltage threshold, a register bit, ENRESET
(r20h[2]), is set to a ‘1.’ This register bit latches and must
be cleared through software. This bit indicates if RESET
asserted low due to EN going under the threshold. The
POR state of ENRESET is ‘0.’ The bit is only set on a fall-
ing edge of the EN comparator output or the software
enable bit. If operating in latch-on fault mode, toggle
EN or toggle the software enable bit to clear the latch
condition and restart the device once the fault condition
has been removed.
Set r73h[2] to ‘1’ to enable monitoring functionality.
Faults are not recorded when the device is in margining
mode. Set r73h[2] to ‘0’ for normal functionality.
Voltage Monitoring
The MAX16068 features an internal 10-bit ADC that mon-
itors the MON_ voltage inputs. An internal multiplexer
cycles through each of the enabled inputs, taking less
than 24Fs for a complete monitoring cycle. Each acquisi-
tion takes approximately 4Fs. At each multiplexer stop,
the 10-bit ADC converts the analog input to a digital
result and stores the result in a register. ADC conversion
results are stored in registers r00h–r0Bh (see Table 2).
Use the SMBus or JTAG serial interface to read ADC
conversion results.
The MAX16068 provides six inputs, MON1–MON6, for
voltage monitoring. Each input-voltage range is pro-
grammable in registers r43h–r44h (see Table 3). When
MON_ configuration registers are set to ’11,’ MON_ volt-
ages are not monitored and the multiplexer does not stop
at these inputs, decreasing the total cycle time. These
inputs cannot be configured to trigger fault conditions.
The two programmable thresholds for each monitored
voltage include an overvoltage and an undervoltage
threshold. See the Faults section for more information
on setting overvoltage and undervoltage thresholds. All
voltage thresholds are 8 bits wide. The 8 MSBs of the
10-bit ADC conversion result are compared to these
overvoltage and undervoltage thresholds.
For any undervoltage or overvoltage condition to be
monitored and any faults detected, the MON_ input must
be assigned to monitoring mode. Inputs that are not
enabled are not converted by the ADC; they contain the
last value acquired before that channel was disabled.
The ADC conversion result registers are reset to 00h at
boot-up. These registers are not reset when a reboot
command is executed.
To temporarily disable voltage monitoring during volt-
age margining conditions, set r73h[2] to ‘1’ to enable
margining mode functionality. Faults (except for faults
triggered by EXTFAULT being pulled low externally) are
not recorded when the device is in margining mode, but
the ADC continues to run and conversion results con-
tinue to be available. Set r73h[2] back to ‘0’ for normal
functionality.
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Table 2. ADC Conversion Results (Read Only)
REGISTER ADDRESS
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
BIT RANGE
[7:0]
[7:6]
[7:0]
[7:6]
[7:0]
[7:6]
[7:0]
[7:6]
[7:0]
[7:6]
[7:0]
[7:6]
MON1 result (MSB)
MON1 result (LSB)
MON2 result (MSB)
MON2 result (LSB)
MON3 result (MSB)
MON3 result (LSB)
MON4 result (MSB)
MON4 result (LSB)
MON5 result (MSB)
MON5 result (LSB)
MON6 result (MSB)
MON6 result (LSB)
DESCRIPTION
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX16068.PDF ] | |
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