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Número de pieza | FSQ100 | |
Descripción | Green Mode Fairchild Power Switch | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de FSQ100 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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FSQ100
Green Mode Fairchild Power Switch (FPS™)
Features
Internal Avalanche-Rugged SenseFET
Precision Fixed Operating Frequency: 67KHz
Burst-Mode Operation
Internal Startup Circuit
Pulse-by-Pulse Current Limiting
Over-Voltage Protection (OVP)
Overload Protection (OLP)
Internal Thermal Shutdown Function (TSD)
Auto-Restart Mode
Under-Voltage Lockout (UVLO) with Hysteresis
Built-in Soft-Start
Secondary-Side Regulation
Applications
Charger & Adapter for Mobile Phone, PDA, MP3
Auxiliary Power for White Goods, PC, C-TV, Monitor
Related Application Notes
AN-4137 — Design Guidelines for Off-line Flyback
Converters using FPS™
AN-4141 — Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback Applications
AN-4147 — Design Guidelines for RCD Snubber of
Flyback
AN-4134 — Design Guidelines for Off-line Forward
Converters using FPS™
AN-4138 — Design Considerations for Battery
Charger Using Green Mode Fairchild Power Switch
(FPS™)
Description
The FSQ100 consists of an integrated Pulse Width
Modulator (PWM) and SenseFET, specifically designed
for high-performance, off-line, Switch-Mode Power
Supplies (SMPS) with minimal external components.
This device is an integrated high-voltage power
switching regulator that combines a VDMOS SenseFET
with a voltage mode PWM control block. The integrated
PWM controller features include a fixed oscillator,
Under-Voltage Lockout (UVLO) protection, Leading
Edge Blanking (LEB), an optimized gate turn-on/turn-off
driver, Thermal Shutdown (TSD) protection, and
temperature-compensated precision-current sources for
loop compensation and fault protection circuitry.
When compared to a discrete MOSFET and controller or
RCC solution, the FSQ100 device reduces total
component count and design size and weight, while
increasing efficiency, productivity, and system reliability.
This device provides a basic platform well suited for
cost-effective flyback converters.
Ordering Information
Product Number
FSQ100
Package
8-DIP
Marking Code
Q100
FPS™ is a trademark of Fairchild Semiconductor Corporation.
© 2007 Fairchild Semiconductor Corporation
FSQ100 Rev. 1.0.2
BVDSS
650V
fOSC
67KHz
RDS(ON)
16Ω
www.fairchildsemi.com
1 page Electrical Characteristics
TA = 25°C, unless otherwise specified.
Symbol
Parameter
Conditions
Min. Typ. Max.
SenseFET Section
IDSS
RDS(ON)
gfs
CISS
COSS
CRSS
Zero-Gate-Voltage Drain Current
Drain-Source On-State Resistance(5)
Forward Trans-Conductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS=650V, VGS=0V
VDS=520V, VGS=0V, TC=125C
VGS=10V, ID=0.5A
VDS=50V, ID=0.5A
VGS=0V, VDS=25V, f=1MHz
1.0
Control Section
fOSC
ΔfOSC
DMAX
VSTART
VSTOP
IFB
tS/S
Switching Frequency
Switching Frequency Variation(6)
Maximum Duty Cycle
UVLO Threshold Voltage
Feedback Source Current
Internal Soft Start Time
-25°C ≤ TA ≤ 85°C
VFB=GND
VFB=GND
0V ≤ VFB ≤ 3V
61
60
8
6
0.35
10
Burst Mode Section
VBURH
VBURL
VBUR(HYS)
Burst Mode Voltage
TJ=25°C
Hysteresis
0.6
0.45
Protection Section
ILIM
TSD
VSD
VOVP
IDELAY
Peak Current Limit
Thermal Shutdown Temperature(7)
Shutdown Feedback Voltage
Over-Voltage Protection
Shutdown Delay Current
3V ≤ VFB ≤ VSD
0.475
125
4.0
20
4
Total Device Section
IOP Operating Supply Current (8)
ICH Startup Charging Current
VCC ≤ 16V
VCC=0V , VSTR=50V
450
Notes:
5. Pulse test: Pulse width ≤ 300µs, duty ≤ 2%.
6. These parameters, although guaranteed, are tested in EDS (wafer test) process.
7. These parameters, although guaranteed, are not 100% tested in production.
8. Control part only.
16
1.3
162
18
3.8
67
±5
67
9
7
0.40
15
0.7
0.55
150
0.550
145
4.5
5
1.5
550
25
200
22
73
±10
74
10
8
0.45
20
0.8
0.65
0.650
5.0
6
3.0
650
Unit
µA
Ω
S
pF
kHz
%
%
V
V
mA
ms
V
V
mV
A
°C
V
V
µA
mA
µA
© 2007 Fairchild Semiconductor Corporation
FSQ100 Rev. 1.0.2
5
www.fairchildsemi.com
5 Page Physical Dimensions
PIN 1 INDICATOR
[ ]0.400 10.160
0.355 9.017
85
[ ]0.280 7.112
0.240 6.096
14
HALF LEAD 4X
0.005 [0.126]
SEATING PLANE
MAX 0.210 [5.334]
FULL LEAD 4X
0.005 [0.126] MIN
[ ]0.195 4.965
0.115 2.933
[ ]0.150 3.811
0.115 2.922
[ ]0.325 8.263
0.300 7.628
MIN 0.015 [0.381]
0.100 [2.540]
[ ]0.022 0.562
0.014 0.358
0.10 C
C
[ ]0.045 1.144
0.030 0.763
4X
[ ]0.070 1.778
0.045 1.143
4X
0.300 [7.618]
0.430 [10.922]
MAX
NOTES:
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) CONTROLING DIMS ARE IN INCHES
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSION S AND TOLERANCES PER ASME
Y14.5M -1982
E) DRAWING FILENAME AND REVSION: MKT-N08MREV1.
Figure 24. 8-Pin Dual Inline Package (DIP)
© 2007 Fairchild Semiconductor Corporation
FSQ100 Rev. 1.0.2
11
www.fairchildsemi.com
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet FSQ100.PDF ] |
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