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PDF WCMC8016V9X Data sheet ( Hoja de datos )
| Número de pieza | WCMC8016V9X | |
| Descripción | 8Mb (512K x 16) Pseudo Static RAM | |
| Fabricantes | Weida Semiconductor | |
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ADVANCE INFORMATION
WCMC8016V9X
8Mb (512K x 16) Pseudo Static RAM
Features
• Wide voltage range: 2.70V–3.30V
• Access Time: 70ns
• Ultra-low active power
— Typical active current: 2.0mA @ f = 1 MHz
— Typical active current: 11mA @ f = fmax
• Ultra low standby power
• Easy memory expansion with CE, CE2, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Offered in a 48 Ball BGA Package
Functional Description[1]
The WCMC8016V9X is a high-performance CMOS pseudo
static RAM organized as 512K words by 16 bits that supports
an asynchronous memory interface. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life® (MoBL®) in
portable applications such as cellular telephones. The device
can be put into standby mode reducing power consumption by
more than 99% when deselected using CE LOW, CE2 HIGH
or both BHE and BLE are HIGH. The input/output pins (I/O0
through I/O15) are placed in a high-impedance state when:
deselected (CE HIGH, CE2 LOW OE is deasserted HIGH), or
during a write operation (Chip Enabled and Write Enable WE
LOW). The device also has an automatic power-down feature
that significantly reduces power consumption by 99% when
addresses are not toggling even when the chip is selected
(Chip Enable CE LOW, CE2 HIGH and both BHE and BLE are
LOW). Reading from the device is accomplished by asserting
the Chip Enables (CE LOW and CE2 HIGH) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
If Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins will appear on I/O0 to
I/O7. If Byte High Enable (BHE) is LOW, then data from
memory will appear on I/O8 to I/O15. See the Truth Table for a
complete description of read and write modes
Logic Block Diagram
DATA IN DRIVERS
www.DataSheet4U.com
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
512K x 16
RAM Array
1T
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power -Down
Circuit
BHE
WE
OE
BLE
CE2
CE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress .com.
WeidaSemiconductor, Inc.
38-14026
Revised August 2003
1 page  
ADVANCE INFORMATION
WCMC8016V9X
AC Test Loads and Waveforms
VCC
OUTPUT
R1
50 pF
INCLUDING
JIG AND
SCOPE
R2
VCC
10%
GND
Rise Time = 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Equivalento:
THÉVENINEQUIVALENT
OUTPUT
RTH
V
Parameters
R1
R2
RTH
VTH
3.0V VCC
1179
1941
733
1.87
Unit
Ω
Ω
Ω
V
www.DataSheet4U.com
38-14026
Page - 5 - of 12
5 Page 
Package
ADVANCE INFORMATION
WCMC8016V9X
48-Ball (6 mm x 8mm x 1.2 mm) FBGA BA48K
www.DataSheet4U.com
51-85193-*A
MoBL and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned
in this document may be the trademarks of their respective holders
38-14026
Page - 11 - of 12
© Weida Semiconductor, Inc., 2002. The information contained herein is subject to change without notice. Weida Semiconductor assumes no responsibility for the use of any circuitry other than
circuitry embodied in a Weida Semiconductor product. Nor does it convey or imply any license under patent or other rights. Weida Semiconductor does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Weida Semiconductor products
in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Weida Semiconductor against all charges.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet WCMC8016V9X.PDF ] | |
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