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PDF PE42510A Data sheet ( Hoja de datos )
| Número de pieza | PE42510A | |
| Descripción | SPDT High Power UltraCMOS RF Switch 30-2000 MHz | |
| Fabricantes | Peregrine Semiconductor | |
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Product Description
The following specification defines an SPDT (single pole
double throw) switch for use in cellular and other wireless
applications. The PE42510A uses Peregrine’s UltraCMOS™
process and it also features HaRP™ technology
enhancements to deliver high linearity and exceptional
harmonics performance. HaRP™ technology is an innovative
feature of the UltraCMOS™ process providing upgraded
linearity performance.
The PE42510A is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
RFC
Product Specification
PE42510A
SPDT High Power UltraCMOS™
RF Switch 30 - 2000 MHz
Features
• No blocking capacitors required
• 50 Watt P1dB compression point
• 10 Watts <8:1 VSWR (Normal
Operation)
• 29 dB Isolation @800 MHz
• < 0.3 dB Insertion Loss at 800 MHz
• 2fo and 3fo < -84 dBc @ 42.5 dBm
• ESD rugged to 2.0 kV HBM
• 32-lead 5x5 mm QFN package
Figure 2. Package Type
32-lead 5x5 mm QFN
RF1 RF2
CMOS
Control Driver
and ESD
CTRL
www.DataSheet4U.com
Table 1. Electrical Specifications @ 25 °C, VDD = 3.3 V (ZS = ZL = 50 Ω) unless otherwise noted
Parameter
Conditions
Min Typ Max
RF Insertion Loss
30 MHz ≤ 1 GHz
1 GHz < 2 GHz
0.4 0.6
0.5 0.7
0.1 dB Input Compression Point
800 MHz, 50% duty cycle
45.4
Isolation (Supply Biased): RF to RFC
800 MHz
25 29
Unbiased Isolation: RF - RFC, VDD, V1=0 V 27 dBm, 800 MHz
5
RF (Active Port) Return Loss
15 22
2nd Harmonic
3rd Harmonic
Switching Time
Lifetime switch cycles
800 MHz @ +42.5 dBm
50% of CTRL to 10/90% of RF
No RF applied
-84
0.04
10^10
-81
0.5
Note: The device was matched with 1.6 nH inductance per RF port
Units
dB
dB
dBm
dB
dB
dB
dBc
ms
cycles
Document No. 70-0266-01 │ www.psemi.com
©2008 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
1 page  
PE42510A
Product Specification
Thermal Data
Though the insertion loss for this part is very low,
when handling high power RF signals, the part can get
quite hot.
Figure 12 shows the estimated power dissipation for a
given incident RF power level. Multiple curves are
presented to show the effect of poor VSWR
conditions. VSWR conditions that present short circuit
loads to the part can cause significantly more power
dissipation than with proper matching.
Figure 13 shows the estimated maximum junction
temperature of the part for similar conditions.
Note that both of these charts assume that the case
(GND slug) temperature is held at 85C. Special
consideration needs to be made in the design of the
PCB to properly dissipate the heat away from the part
and maintain the 85C maximum case temperature. It
is recommended to use best design practices for high
power QFN packages: multi-layer PCBs with thermal
vias in a thermal pad soldered to the slug of the
package. Special care also needs to be made to
alleviate solder voiding under the part.
Table 6. Theta JC
Parameter
wwwTh.DeatataJSChe(+e8t45U°C.c)om
Min Typ Max Units
24.0 C/W
Figure 12. Power Dissipation
2.5
1: 1 V SWR (50 Ohm Load)
2: 1 V SWR (25 Ohm Load)
2.0 8: 1 V SWR (6.25 Ohm Load)
20: 1 V SWR (2. 5 Ohm Load)
I NF: 1 V SWR (0 Ohm Load)
1.5 Rel i abi l i t y Li mi t
1.0
0.5
0.0
30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
RF Pow er (dBm)
Figure 13. Maximum Junction Temperature
145
140
135
130
125
120
115
1: 1 V SWR (50 Ohm Load)
2: 1 V SWR (25 Ohm Load)
8: 1 V SWR (6. 25 Ohm Load)
20: 1 V SWR (2. 5 Ohm Load)
I NF: 1 V SWR (0 Ohm Load)
Rel i abi l i t y Li mi t
110
105
100
95
90
85
30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
RF Power (dBm)
Note: Case temperature = 85°C
Document No. 70-0266-01 │ www.psemi.com
©2008 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
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| PDF Descargar | [ Datasheet PE42510A.PDF ] | |
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