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PDF TC7MBL3257AFT Data sheet ( Hoja de datos )

Número de pieza TC7MBL3257AFT
Descripción Quad 1-of-2 Multiplexer/Demultiplexer
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC7MBL3257AFT Hoja de datos, Descripción, Manual

TC7MBL3257AFT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MBL3257AFT, TC7MBL3257AFK
Quad 1-of-2 Multiplexer/Demultiplexer
The TC7MBL3257A is high-speed CMOS quad 1-2
multiplexer/demultiplexer. The low on resistance of the switch
allows connections to be made with minimal propagation delay
time.
This device consists of four individual two-inputs
multiplexer/demultiplexer with common select input (S) and
output enable ( OE ). The A inputs is connected to the B1 or B2
outputs determined by the combination both the select input (S)
and output enable ( OE ). When the output enable ( OE ) input is
held “H” level, the switches are open with regardless the state of
select inputs and a high-impedance state exists between the
switches.
All inputs are equipped with protection circuits against static
discharge.
Features
Operating voltage: VCC = 2.0 to 3.6 V
High speed: tpd = 0.31ns (max.) @ VCC =3.0V
Low on resistance: RON = 5 Ω (typ.) @ VCC =3.0V
ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
Package: TSSOP16,VSSOP16 (US16)
Pin compatible with the 74xx257 type.
Pin Assignment (top view)
www.DataSheet4U.com
TC7MBL3257AFT
TC7MBL3257AFK
Weight:
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.06 g (typ.)
: 0.02 g (typ.)
S1
1B1 2
1B2 3
1A 4
2B1 5
2B2 6
2A 7
GND 8
16 VCC
15 OE
14 4B1
13 4B2
12 4A
11 3B1
10 3B2
9 3A
1 2008-09-01

1 page




TC7MBL3257AFT pdf
AC Test Circuit
Output
Switch
Open
2 × VCC
GND
Measure
CL = 50 pF
RL = 500 Ω
TC7MBL3257AFT/FK
Parameter
tpLH, tpHL
tpLZ, tpZL
tpHZ, tpZH
Switch
Open
2 × VCC
GND
AC Waveform
Input
(A, B)
Output
(B, A)
Figure 1
tr 2.5 ns
tf 2.5 ns
90%
50%
10%
tpLH
50%
tpHL
Figure 2 tpLH, tpHL
VCC
GND
VOH
VOL
www.DataSheet4U.com Output Enable
( OE )
Output (A, B)
Low to Off to Low
Output (A, B)
High to Off to High
tr 2.5 ns
tpLZ
tf 2.5 ns
90%
50%
10%
tpZL
tpHZ
10%
90%
tpZH
Outputs
enabled
Outputs
disabled
50%
50%
Outputs
enabled
Figure 3 tpLZ, tpHZ, tpZL, tpZH
VCC
GND
VOH
VOL
VOH
VOL
5 2008-09-01

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