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PDF FDFMA2P859T Data sheet ( Hoja de datos )
| Número de pieza | FDFMA2P859T | |
| Descripción | Integrated P-Channel PowerTrench MOSFET and Schottky Diode | |
| Fabricantes | Fairchild Semiconductor | |
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FDFMA2P859T
July 2009
Integrated P-Channel PowerTrench® MOSFET and Schottky Diode
–20 V, –3.0 A, 120 m:
Features
General Description
MOSFET:
Max rDS(on) = 120 m: at VGS = –4.5 V, ID = –3.0 A
Max rDS(on) = 160 m: at VGS = –2.5 V, ID = –2.5 A
Max rDS(on) = 240 m: at VGS = –1.8 V, ID = –1.0 A
Schottky:
VF < 0.54 V @ 1 A
Low profile - 0.55 mm maximum - in the new package
MicroFET 2x2 Thin
Free from halogenated compounds and antimony oxides
RoHS compliant
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features a MOSFET with low
on-state resistance and an independently connected low forward
voltage schottky diode for minimum conduction losses.
The MicroFET 2x2 Thin package offers exceptional thermal
performance for its physical size and is well suited to linear mode
applications.
Pin 1
A NC D
A1
NC 2
D3
6C
5G
4S
CG S
MicroFET 2x2 Thin
www.DataShMeeOt4SU.FcoEmT Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
VRRM
IO
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Schottky Repetitive Peak Reverse Voltage
Schottky Average Forward Current
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
–20
±8
–3
–6
1.4
0.7
–55 to +150
30
1
Units
V
V
A
W
°C
V
A
RTJA
RTJA
RTJA
RTJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
86
173
86
140
°C/W
Device Marking
59
Device
FDFMA2P859T
Package
MicroFET 2x2 Thin
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
©2009 Fairchild Semiconductor Corporation
FDFMA2P859T Rev.B
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
5
ID = -3.0 A
4
3
2
1
VDD = -5 V
VDD = -10 V
VDD = -15 V
0
01234
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
5
700
600
500 Ciss
400
300
200
100
Crss
0
0
Coss
f = 1 MHz
VGS = 0 V
4 8 12 16
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. Capacitance vs Drain
to Source Voltage
20
10
100 us
1 ms
1
THIS AREA IS
LIMITED BY rDS(on)
0.1 SINGLE PULSE
TJ = MAX RATED
RTJA = 173 oC/W
TA = 25 oC
0.01
0.1
1
10
-VDS, DRAIN to SOURCE VOLTAGE (V)
10 ms
100 ms
1s
10 s
DC
50
Figure 9. Forward Bias Safe
Operating Area
www.DataSheet4U.com
10000
1000
TJ = 125 oC
100 TJ = 85 oC
10
1 TJ = 25 oC
0.1
0.01
0
5 10 15 20 25
VR, REVERSE VOLTAGE (V)
30
Figure 11. Schottky Diode Reverse Current
10
TJ = 125 oC
1
0.1 TJ = 25 oC
0.01
0
0.2 0.4 0.6 0.8 1.0 1.2
VF, FORWARD VOLTAGE (V)
Figure 10. Schottky Diode Foward Voltage
200
100
VGS = -10 V
SINGLE PULSE
10 RTJA = 173 oC/W
TA = 25 oC
1
0.5
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDFMA2P859T Rev.B
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDFMA2P859T.PDF ] | |
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