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PDF LC66354C Data sheet ( Hoja de datos )

Número de pieza LC66354C
Descripción Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC66354C Hoja de datos, Descripción, Manual

No. 5484
Preliminary
CMOS LSI
LC66354C, 66356C, 66358C
Four-Bit Single-Chip Microcontrollers
with 4, 6, and 8 KB of On-Chip ROM
Overview
The LC66354C, LC66356C, and LC66358C are 4-bit
CMOS microcontrollers that integrate on a single chip all
the functions required in a system controller, including
ROM, RAM, I/O ports, a serial interface, comparator
inputs, three-value inputs, timers, and interrupt functions.
These three microcontrollers are available in a 42-pin
package.
These products differ from the earlier LC66358A Series
and LC66358B Series in the power-supply voltage range,
the operating speed, and other points.
• Evaluation LSIs
— LC66599 (evaluation chip) + EVA85/800-TB6630X
— LC66E308 (on-chip EPROM microcontroller)
used together.
Package Dimensions
unit: mm
3025B-DIP42S
[LC66354C/66356C/66358C]
42 22
Features and Functions
• On-chip ROM capacities of 4, 6, and 8 kilobytes, and an
on-chip RAM capacity of 512 × 4 bits.
• Fully supports the LC66000 Series common instruction
set (128 instructions).
• I/O ports: 36 pins
• 8-bit serial interface: two circuits (can be connected in
cascade to form a 16-bit interface)
• Instruction cycle time: 0.92 to 10 µs (at 2.5 to 5.5 V)
— For the earlier LC66358A Series: 1.96 to 10 µs (at
3.0 to 5.5 V) and 3.92 to 10 µs (at 2.2 to 5.5 V)
— For the earlier LC66358B Series: 0.92 to 10 µs (at
3.0 to 5.5 V)
• Powerful timer functions and prescalers
— Time limit timer, event counter, pulse width
measurement, and square wave output using a 12-bit
timer.
— Time limit timer, event counter, PWM output, and
square wave output using an 8-bit timer.
— Time base function using a 12-bit prescaler.
• Powerful interrupt system with 8 interrupt factors and 8
interrupt vector locations.
— External interrupts: 3 factors/3 vector locations
— Internal interrupts: 5 factors/5 vector locations
• Flexible I/O functions
Comparator inputs, three-value inputs, 20-mA drive
outputs, 15-V high-voltage pins, and pull-up/open-drain
options.
• Optional runaway detection function (watchdog timer)
• 8-bit I/O functions
• Power saving functions using halt and hold modes.
• Packages: DIP42S, QIP48E (QFP48E)
1
37.9
21
0.95 0.48 1.78 1.15
SANYO: DIP42S
unit: mm
3156-QFP48E
[LC66354C/66356C/66358C]
17.2
14.0
1.5 1.0
36
37
1.6
1.5
25
24
0.15
48
1
0.35
13
12
0.1
2.70
(STAND OFF)
0.8 15.6
SANYO: QFP48E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
22897HA (OT) No. 5484-1/21

1 page




LC66354C pdf
LC66354C, 66356C, 66358C
Pin Function Overview
Pin I/O
Overview
Output driver type
Options
State after a reset
P00
P01
P02
P03
I/O
I/O ports P00 to P03
• Input or output in 4-bit or 1-bit units
• P00 to P03 support the halt mode control
function
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or Nch
OD output
• Output level on reset
High or low
(option)
P10
P11
P12
P13
P20/SI0
P21/SO0
P22/SCK0
P23/INT0
I/O
I/O ports P10 to P13
Input or output in 4-bit or 1-bit units
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or Nch
OD output
• Output level on reset
High or low
(option)
I/O ports P20 to P23
• Input or output in 4-bit or 1-bit units
• P20 is also used as the serial input SI0
pin.
• P21 is also used as the serial output
I/O
SO0 pin.
• P22 is also used as the serial clock
SCK0 pin.
• P23 is also used as the INT0 interrupt
request pin, and also as the timer 0
event counting and pulse width
measurement input.
• Pch: CMOS type
• Nch: Intermediate sink current
type
• Nch: +15-V handling when OD
option selected
CMOS or Nch OD
output
H
P30/INT1
P31/POUT0
P32/POUT1
I/O ports P30 to P32
• Input or output in 3-bit or 1-bit units
• P30 is also used as the INT1 interrupt
I/O
request.
• P31 is also used for the square wave
output from timer 0.
• P32 is also used for the square wave
output from timer 1.
• Pch: CMOS type
• Nch: Intermediate sink current
type
• Nch: +15-V handling when OD
option selected
CMOS or Nch OD
output
H
P33/HOLD
Hold mode control input
• Hold mode is set up by the HOLD
instruction when HOLD is low.
• In hold mode, the CPU is restarted by
setting HOLD to the high level.
I
• This pin can be used as input port P33
along with P30 to P32.
• When the P33/HOLD pin is at the low
level, the CPU will not be reset by a low
level on the RES pin. Therefore,
applications must not set P33/HOLD low
when power is first applied.
I/O ports P40 to P43
P40
P41
P42
P43
• Input or output in 4-bit or 1-bit units
• Pch: Pull-up MOS type
• Input or output in 8-bit units when used
I/O in conjunction with P50 to P53.
• Can be used for output of 8-bit ROM
• Nch: Intermediate sink current
type
• Nch: +15-V handling when OD
Pull-up MOS or Nch OD
output
data when used in conjunction with P50
option selected
to P53.
P50
P51
P52
P53/INT2
I/O ports P50 to P53
• Input or output in 4-bit or 1-bit units
• Input or output in 8-bit units when used • Pch: Pull-up MOS type
I/O
in conjunction with P40 to P43.
• Can be used for output of 8-bit ROM
data when used in conjunction with P40
• Nch: Intermediate sink current
type
• Nch: +15-V handling when OD
Pull-up MOS or Nch OD
output
to P43.
option selected
• P53 is also used as the INT2 interrupt
request.
H
H
Continued on next page.
No. 5484-5/21

5 Page





LC66354C arduino
LC66354C, 66356C, 66358C
Continued from preceding page.
Parameter
Symbol
Conditions
[Pulse conditions]
INT0 high and low-level
tIOH, tIOL
INT0: Figure 6, conditions under which the INT0
interrupt can be accepted, conditions under
which the timer 0 event counter or pulse width
measurement input can be accepted
High and low-level pulse widths
for interrupt inputs other than INT0
tIIH, tIIL
INT1, INT2: Figure 6, conditions under which
the corresponding interrupt can be accepted
PIN1 high and low-level
pulse widths
PIN1: Figure 6, conditions under which the
tPINH, tPINL timer 1 event counter input can be accepted
RES high and low-level
pulse widths
RES: Figure 6, conditions under which reset
tRSH, tRSL can be applied.
min
2
2
2
3
typ max Unit Note
Tcyc
Tcyc
Tcyc
Tcyc
Comparator response speed
TRS PD: Figure 7, VDD = 3.0 to 5.5 V
20 ms
Operating current drain
IDD OP
VDD: 4-MHz ceramic oscillator
VDD: 4-MHz external clock
3.0 5.0 mA
6
3.0 5.0 mA
Halt mode current drain
IDDHALT
VDD: 4-MHz ceramic oscillator
VDD: 4-MHz external clock
1.0 2.0 mA
1.0 2.0 mA
Hold mode current drain
IDDHOLD VDD: VDD = 1.8 to 5.5 V
0.01
10 µA
Note: 1. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. These pins cannot be used as input pins if the
CMOS output specifications are selected.
2. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. The rating for the pull-up output specification pins is
stipulated in terms of the output pull-up current IPO. These pins cannot be used as input pins if the CMOS output specifications are selected.
3. With the output Nch transistor off for CMOS output specification pins.
4. With the output Nch transistor off for pull-up output specification pins.
5. With the output Nch transistor off for open-drain output specification pins.
6. Reset state
VDD
0.8VDD
OSC1 (OSC2)
External clock OPEN
textL
textH
textF
textR
1/fext
0.2VDD
VSS
Figure 1 External Clock Input Waveform
VDD
OSC1
OSC2
Rd
C1 Ceramic C2
oscillator
OSC
Oscillator
unstable period
tCFS
Operating VDD
minimum value
0V
Stable oscillation
Figure 2 Ceramic Oscillator Circuit
Figure 3 Oscillator Stabilization Period
Table 1 Guaranteed Ceramic Oscillator Constants
4 MHz
(Murata Mfg. Co., Ltd.)
CSA4.00MG
C1 = 33 pF ± 10%
C2 = 33 pF ± 10%
Rd = 0 Ω
4 MHz
(Kyocera Corporation)
KBR4.0MS
C1 = 33 pF ± 10%
C2 = 33 pF ± 10%
Rd = 0 Ω
No. 5484-11/21

11 Page







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