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PDF 89E54RD2 Data sheet ( Hoja de datos )

Número de pieza 89E54RD2
Descripción SST89E54RD2
Fabricantes Silicon Storage Technology 
Logotipo Silicon Storage Technology Logotipo



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No Preview Available ! 89E54RD2 Hoja de datos, Descripción, Manual

FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
FEATURES:
SST89E/V58 / 54 / 52RD2/RD FlashFlex51 MCU
Data Sheet
• 8-bit 8051-Compatible Microcontroller (MCU)
with Embedded SuperFlash Memory
– Fully Software Compatible
– Development Toolset Compatible
– Pin-For-Pin Package Compatible
• SST89E5xRD2 Operation
– 0 to 40 MHz at 5V
• SST89V5xRD2 Operation
– 0 to 33 MHz at 3V
• 1 KByte Internal RAM
• Dual Block SuperFlash EEPROM
– 8/16/32 KByte primary block +
8 KByte secondary block
(128-Byte sector size for both blocks)
– Individual Block Security Lock with SoftLock
– Concurrent Operation during
In-Application Programming (IAP)
– Memory Overlay for Interrupt Support during IAP
• Support External Address Range up to 64
KByte of Program and Data Memory
• Three High-Current Drive Ports (16 mA each)
• Three 16-bit Timers/Counters
• Full-Duplex, Enhanced UART
– Framing Error Detection
– Automatic Address Recognition
• Ten Interrupt Sources at 4 Priority Levels
– Four External Interrupt Inputs
• Programmable Watchdog Timer (WDT)
• Programmable Counter Array (PCA)
• Four 8-bit I/O Ports (32 I/O Pins) and
One 4-bit Port
• Second DPTR register
• Low EMI Mode (Inhibit ALE)
• SPI Serial Interface
• Standard 12 Clocks per cycle, the device has an
option to double the speed to 6 clocks per cycle.
• TTL- and CMOS-Compatible Logic Levels
• Brown-out Detection
• Low Power Modes
– Power-down Mode with External Interrupt Wake-up
– Idle Mode
• Temperature Ranges:
– Commercial (0°C to +70°C)
– Industrial (-40°C to +85°C)
• Packages Available
– 40-contact WQFN (Port 4 feature not available)
– 44-lead PLCC
– 40-pin PDIP (Port 4 feature not available)
– 44-lead TQFP
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
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The SST89E5xRD2/RD and SST89V5xRD2/RD are
members of the FlashFlex51 family of 8-bit microcontroller
products designed and manufactured with SST’s patented
and proprietary SuperFlash CMOS semiconductor pro-
cess technology. The split-gate cell design and thick-oxide
tunneling injector offer significant cost and reliability bene-
fits for SST’s customers. The devices use the 8051 instruc-
tion set and are pin-for-pin compatible with standard 8051
microcontroller devices.
The devices come with 16/24/40 KByte of on-chip flash
EEPROM program memory which is partitioned into 2
independent program memory blocks. The primary Block 0
occupies 8/16/32 KByte of internal program memory space
and the secondary Block 1 occupies 8 KByte of internal
program memory space.
The 8-KByte secondary block can be mapped to the lowest
location of the 8/16/32 KByte address space; it can also be
hidden from the program counter and used as an indepen-
dent EEPROM-like data memory.
In addition to the 16/24/40 KByte of EEPROM program
memory on-chip, the devices can address up to 64 KByte
of external program memory. In addition to 1024 x8 bits of
on-chip RAM, up to 64 KByte of external RAM can be
addressed.
The flash memory blocks can be programmed via a stan-
dard 87C5x OTP EPROM programmer fitted with a special
adapter and the firmware for SST’s devices. During power-
on reset, the devices can be configured as either a slave to
an external host for source code storage or a master to an
external host for an in-application programming (IAP) oper-
ation. The devices are designed to be programmed in-sys-
tem and in-application on the printed circuit board for
maximum flexibility. The devices are pre-programmed with
an example of the bootstrap loader in the memory, demon-
strating the initial user program code loading or subsequent
user code updating via the IAP operation. The sample
bootstrap loader is available for the user’s reference and
convenience only; SST does not guarantee its functionality
or usefulness. Chip-Erase or Block-Erase operations will
erase the pre-programmed sample code.
©2006 Silicon Storage Technology, Inc.
S71255-05-000
5/06
1
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

1 page




89E54RD2 pdf
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
LIST OF TABLES
Data Sheet
TABLE 2-1: Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TABLE 3-1: SFCF Values for Program Memory Block Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
TABLE 3-2: SFCF Values Under Different Reset Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
TABLE 3-3: External Data Memory RD#, WR# with EXTRAM bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TABLE 3-4: FlashFlex51 SFR Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
TABLE 3-5: CPU related SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TABLE 3-6: Flash Memory Programming SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TABLE 3-7: Watchdog Timer SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 3-8: Timer/Counters SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TABLE 3-9: Interface SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TABLE 3-10: PCA SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TABLE 4-1: Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TABLE 4-2: IAP Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TABLE 5-1: Timer/Counter 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TABLE 5-2: Timer/Counter 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 5-3: Timer/Counter 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 8-1: PCA Timer/Counter Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
TABLE 8-2: PCA Timer/Counter Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
TABLE 8-3: CMOD Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
TABLE 8-4: PCA High and Low Register Compare/Capture Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
TABLE 8-5: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
TABLE 8-6: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
TABLE 8-7: Pulse Width Modulator Frequencies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
TABLE 9-1: Security Lock Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
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TABLE 9-2: Security Lock Access Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
TABLE 11-1: Interrupt Polling Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
TABLE 12-1: Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
TABLE 13-1: Recommended Values for C1 and C2 by Crystal Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TABLE 13-2: Clock Doubling Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TABLE 14-1: Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
TABLE 14-2: Reliability Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-3: AC Conditions of Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-4: Recommended System Power-up Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-5: Pin Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-6: DC Electrical Characteristics for SST89E5xRD2/RD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
TABLE 14-7: DC Electrical Characteristics for SST89V5xRD2/RD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
TABLE 14-8: AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
TABLE 14-9: External Clock Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
TABLE 14-10: Serial Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
TABLE 14-11: Flash Memory Programming/Verification Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
TABLE 16-1: Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
©2006 Silicon Storage Technology, Inc.
5
S71255-05-000
5/06

5 Page





89E54RD2 arduino
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
3.0 MEMORY ORGANIZATION
Data Sheet
The device has separate address spaces for program and
data memory.
3.1 Program Flash Memory
There are two internal flash memory blocks in the device.
The primary flash memory block (Block 0) has 8/16/32
KByte. The secondary flash memory block (Block 1) has 8
KByte. Since the total program address space is limited to
64 KByte, the SFCF[1:0] bit are used to control program
bank selection. Please refer to Figures 3-1 through 3-3 for
the program memory configuration. Program bank selec-
tion is described in the next section.
The 8K/16K/32K x8 primary SuperFlash block is organized
as 64/128/256 sectors, each sector consists of 128 Bytes.
The 8K x8 secondary SuperFlash block is organized as 64
sectors, each sector consists also of 128 Bytes.
For both blocks, the 7 least significant program address bits
select the byte within the sector. The remainder of the pro-
gram address bits select the sector within the block.
FFFFH
EA# = 0
EA# = 1
SFCF[1:0] = 00
FFFFH
E000H
DFFFH
8 KByte
Block 1
EA# = 1
SFCF[1:0] = 01
FFFFH
E000H
DFFFH
8 KByte
Block 1
EA# = 1
SFCF[1:0] = 10, 11
FFFFH
External
64 KByte
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Not
Accessible
Not
Accessible
Not
Accessible
0000H
2000H
1FFFH
0000H
8 KByte
Block 1
2000H
1FFFH
0000H
8 KByte
Block 0
2000H
1FFFH
0000H
FIGURE 3-1: Program Memory Organization for 8 KByte SST89x52RDx
8 KByte
Block 0
1255 F01.1
©2006 Silicon Storage Technology, Inc.
11
S71255-05-000
5/06

11 Page







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